Commit 2f4efb59 authored by vaillancour's avatar vaillancour
Browse files

updating few comments

parent 29861d76
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@
#define MOD_BIT_ALLOC_ROM_TABLE   // Just to highlight modification in bit allocation table and to ensure these modifications doesn't affect EVS modes*/
#define SIMPLIFY_CODE_BE   // Simplify synthesis loop

//#define AFFECT_TEST_VECTOR_BE_dec  /* This is related to the CR concerning lead_deindexing, it is just that my test vectors are not updated accordingly */
//#define AFFECT_TEST_VECTOR_BE_dec  /* This is related to the CR concerning lead_deindexing */


#if 0  /*These are a list of switches that highlight probable places where IVAS code would need to be added */
@@ -106,7 +106,7 @@

/*#define ADD_IVAS_HQ_CODE_L_SPEC*/ /*-->> might go hand in hand with SOLVED_COMP_ENC_DEC*/
#ifdef ADD_IVAS_HQ_CODE_L_SPEC  
 #define SOLVED_COMP_ENC_DEC//  /*HQ classifier must be aligned between encoder and decoder -> Does break to IO with legacy EVS  48 kHz high bitrate?, seems ok from preliminry tests */
 #define SOLVED_COMP_ENC_DEC//  /*HQ classifier must be aligned between encoder and decoder -> could it break IO BE compared to legacy EVS  48 kHz high bitrate?, seems ok from preliminry tests */
#endif