Commit 7a214523 authored by multrus's avatar multrus
Browse files

[cleanup] accept NONBE_1214_PLC_LSF_MEMORY

parent dea809b9
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+0 −1
Original line number Diff line number Diff line
@@ -172,7 +172,6 @@
#define NONBE_1217_OBJ_EDIT_FOA                         /* VA/Nokia: isse 1217: fix crash in object editing to FOA output in ParamISM */
#define NONBE_FIX_1255_OBJ_EDIT_JBM                     /* VA: issue 1255: restore object editing in JBM */
#define NONBE_FIX_1262_OSBA_STEREO                      /* FhG: issue 1262: Fix missing scaling factor for OSBA stereo output */
#define NONBE_1214_PLC_LSF_MEMORY                       /* VA: issue 1224: reset ACELP PLC FEC memory in case of switching from MDCT stereo to TD/DFT stereo */
#define NONBE_FIX_1261_MASA_EXT_META_JBM                /* Nokia: issue #1261: MASA metadata EXT output delay buffer init in JBM */

/* ##################### End NON-BE switches ########################### */
+0 −5
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@@ -263,14 +263,9 @@ ivas_error core_switching_pre_dec(
        st->uv_count = 0;
    }

#ifdef NONBE_1214_PLC_LSF_MEMORY
    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ ||
         ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) ||
         ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ )
#else
    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 &&
                                                                                                    st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) )
#endif
    {
        if ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD )
        {
+0 −4
Original line number Diff line number Diff line
@@ -171,13 +171,9 @@ void core_switching_pre_enc(
        st->uv_count = 0;
    }

#ifdef NONBE_1214_PLC_LSF_MEMORY
    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ ||
         ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) ||
         ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ )
#else
    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) )
#endif
    {
        /* Reset the ACELP core in case of HQ->ACELP core switching */