Loading lib_com/options.h +0 −1 Original line number Diff line number Diff line Loading @@ -146,7 +146,6 @@ #define FADE_TO_ZERO_FOR_TOO_LONG_FRAMELOSS /*#define FIX_I1_113*/ /* under review : MCT bit distribution optimization for SBA high bitrates*/ #define FIX_I102_SWB_TBE_SWITCH /* Issue 102: avoid IO->SWB switching code for IVAS, generate SHB ACB mem with lerp in case of switch */ #define FIX_DIRAC_CHANNELS /* Issue 71: lower number of DirAC analysis channels */ #define HARMONIZE_SBA_NCHAN_TRANSPORT /* harmonize setting of number of transport channels in SBA */ #define FIX_I13_TCX_TNS_ISSUE /* Issue 13: Fix reported artifacts. Bug in TNS with TCX5 */ Loading lib_dec/acelp_core_dec.c +2 −2 Original line number Diff line number Diff line Loading @@ -701,13 +701,13 @@ ivas_error acelp_core_dec( mvr2r( old_exc_s + st->L_frame - M, st->mem_syn2, M ); residu( Aq, M, old_exc_s, old_exc + L_EXC_MEM_DEC - st->L_frame, st->L_frame ); } #ifdef FIX_I102_SWB_TBE_SWITCH if ( st->last_core != ACELP_CORE && st->element_mode > EVS_MONO ) { /* Prepare ACB memory of old_bwe_exc */ lerp( old_exc, old_bwe_exc, L_EXC_MEM_DEC * HIBND_ACB_L_FAC, L_EXC_MEM_DEC ); } #endif /*-----------------------------------------------------------------* * FEC - first good frame after lost frame(s) (possibility to correct the ACB) *-----------------------------------------------------------------*/ Loading lib_enc/acelp_core_enc.c +2 −2 Original line number Diff line number Diff line Loading @@ -472,13 +472,13 @@ ivas_error acelp_core_enc( mvr2r( hLPDmem->old_exc + st->L_frame - M, hLPDmem->mem_syn, M ); residu( Aq, M, hLPDmem->old_exc, old_exc, st->L_frame ); } #ifdef FIX_I102_SWB_TBE_SWITCH if ( st->last_core != ACELP_CORE && st->element_mode > EVS_MONO ) { /* Prepare ACB memory of old_bwe_exc */ lerp( old_exc, old_bwe_exc, L_EXC_MEM_DEC * HIBND_ACB_L_FAC, L_EXC_MEM_DEC ); } #endif /*---------------------------------------------------------------* * Calculation of LP residual (filtering through A[z] filter) Loading lib_enc/swb_pre_proc.c +3 −35 Original line number Diff line number Diff line Loading @@ -287,21 +287,15 @@ void swb_pre_proc( FD_BWE_ENC_HANDLE hBWE_FD; int32_t inner_Fs, input_Fs; float old_input[NS2SA( 48000, DELAY_FD_BWE_ENC_NS + DELAY_FIR_RESAMPL_NS ) + L_FRAME48k]; float spchTmp[640]; #ifdef FIX_I102_SWB_TBE_SWITCH float spchTmp2[640]; int16_t L_resamp; #endif int16_t i, j; float spchTmp[L_FRAME32k], spchTmp2[L_FRAME32k]; int16_t i, j, L_resamp; int16_t startB, endB; float *realBufferFlipped[CLDFB_NO_COL_MAX]; float *imagBufferFlipped[CLDFB_NO_COL_MAX]; float realBufferTmp[CLDFB_NO_COL_MAX][20]; float imagBufferTmp[CLDFB_NO_COL_MAX][20]; int16_t ts, nB, uB; float sign; float lbEner, v, t; float regression; float sign, lbEner, v, t, regression; const float *thr, *regV; int16_t Sample_Delay_SWB_BWE32k, lMemRecalc32k, dft_ovl32k; Loading Loading @@ -681,11 +675,7 @@ void swb_pre_proc( } else { #ifdef FIX_I102_SWB_TBE_SWITCH if ( ( st->bwidth == FB || st->core == ACELP_CORE ) && ( st->element_mode == EVS_MONO ) ) #else if ( st->bwidth == FB || st->core == ACELP_CORE || ( st->element_mode == IVAS_CPE_DFT && input_Fs == 48000 ) ) #endif { set_f( hBWE_TD->old_speech_shb, 0, L_LOOK_16k + L_SUBFR16k ); set_f( shb_speech, 0, L_FRAME16k ); /* shb_speech for FB/SWB BWE_HIGHRATE is not used at 64kbps */ Loading @@ -697,16 +687,9 @@ void swb_pre_proc( st->hBWE_TD->prev_pow_exc16kWhtnd = 1.0f; st->hBWE_TD->prev_mix_factor = 1.0f; st->hBWE_TD->prev_Env_error = 0.0f; #ifndef FIX_I102_SWB_TBE_SWITCH if ( st->element_mode == IVAS_CPE_DFT ) { set_f( hCPE->hStereoDft->output_mem_dmx_16k_shb, 0, STEREO_DFT_OVL_16k ); } #endif } else { #ifdef FIX_I102_SWB_TBE_SWITCH if ( st->element_mode == IVAS_CPE_DFT ) { if ( st->L_frame == L_FRAME ) Loading Loading @@ -742,15 +725,7 @@ void swb_pre_proc( spchTmp[i] = -spchTmp[i]; } } #else /* flip the spectrm */ mvr2r( new_swb_speech, spchTmp, L_FRAME32k ); for ( i = 0; i < L_FRAME32k; i = i + 2 ) { spchTmp[i] = -spchTmp[i]; } #endif Decimate_allpass_steep( spchTmp, hBWE_TD->state_ana_filt_shb, L_FRAME32k, shb_speech ); mvr2r( shb_speech + L_FRAME16k - ( L_LOOK_16k + L_SUBFR16k ), hBWE_TD->old_speech_shb, L_LOOK_16k + L_SUBFR16k ); Loading @@ -770,23 +745,16 @@ void swb_pre_proc( /* Reset CLDFB synthesis buffer */ set_f( st->cldfbSynTd->cldfb_state, 0.0f, st->cldfbSynTd->p_filter_length ); } #ifdef FIX_I102_SWB_TBE_SWITCH else { hCPE->hStereoDft->flip_sign = -hCPE->hStereoDft->flip_sign; /* Make sure sign is updated even if DFT SHB target is not generated */ } #endif } /* Memory reset to compensate for 0.9375 ms offset when transitioning from IO to SWB */ /* When switching from n >1 to n = 1, we keep the enc/dec delay as 8.75/3.25 and below code not needed; only when n = 1 start, it will be 9.6875/2.3125 in that case this reset is needed for IO->BWE.*/ #ifdef FIX_I102_SWB_TBE_SWITCH if ( st->last_extl == -1 && st->element_mode == EVS_MONO ) #else /* IVAS_fmToDo: revisit for IVAS (the condition is currently entered for both TD and DFT stereo - is it desirable?) */ if ( st->last_extl == -1 ) #endif { delay = NS2SA( input_Fs, DELAY_FIR_RESAMPL_NS ); for ( i = 0; i < delay; i++ ) Loading Loading
lib_com/options.h +0 −1 Original line number Diff line number Diff line Loading @@ -146,7 +146,6 @@ #define FADE_TO_ZERO_FOR_TOO_LONG_FRAMELOSS /*#define FIX_I1_113*/ /* under review : MCT bit distribution optimization for SBA high bitrates*/ #define FIX_I102_SWB_TBE_SWITCH /* Issue 102: avoid IO->SWB switching code for IVAS, generate SHB ACB mem with lerp in case of switch */ #define FIX_DIRAC_CHANNELS /* Issue 71: lower number of DirAC analysis channels */ #define HARMONIZE_SBA_NCHAN_TRANSPORT /* harmonize setting of number of transport channels in SBA */ #define FIX_I13_TCX_TNS_ISSUE /* Issue 13: Fix reported artifacts. Bug in TNS with TCX5 */ Loading
lib_dec/acelp_core_dec.c +2 −2 Original line number Diff line number Diff line Loading @@ -701,13 +701,13 @@ ivas_error acelp_core_dec( mvr2r( old_exc_s + st->L_frame - M, st->mem_syn2, M ); residu( Aq, M, old_exc_s, old_exc + L_EXC_MEM_DEC - st->L_frame, st->L_frame ); } #ifdef FIX_I102_SWB_TBE_SWITCH if ( st->last_core != ACELP_CORE && st->element_mode > EVS_MONO ) { /* Prepare ACB memory of old_bwe_exc */ lerp( old_exc, old_bwe_exc, L_EXC_MEM_DEC * HIBND_ACB_L_FAC, L_EXC_MEM_DEC ); } #endif /*-----------------------------------------------------------------* * FEC - first good frame after lost frame(s) (possibility to correct the ACB) *-----------------------------------------------------------------*/ Loading
lib_enc/acelp_core_enc.c +2 −2 Original line number Diff line number Diff line Loading @@ -472,13 +472,13 @@ ivas_error acelp_core_enc( mvr2r( hLPDmem->old_exc + st->L_frame - M, hLPDmem->mem_syn, M ); residu( Aq, M, hLPDmem->old_exc, old_exc, st->L_frame ); } #ifdef FIX_I102_SWB_TBE_SWITCH if ( st->last_core != ACELP_CORE && st->element_mode > EVS_MONO ) { /* Prepare ACB memory of old_bwe_exc */ lerp( old_exc, old_bwe_exc, L_EXC_MEM_DEC * HIBND_ACB_L_FAC, L_EXC_MEM_DEC ); } #endif /*---------------------------------------------------------------* * Calculation of LP residual (filtering through A[z] filter) Loading
lib_enc/swb_pre_proc.c +3 −35 Original line number Diff line number Diff line Loading @@ -287,21 +287,15 @@ void swb_pre_proc( FD_BWE_ENC_HANDLE hBWE_FD; int32_t inner_Fs, input_Fs; float old_input[NS2SA( 48000, DELAY_FD_BWE_ENC_NS + DELAY_FIR_RESAMPL_NS ) + L_FRAME48k]; float spchTmp[640]; #ifdef FIX_I102_SWB_TBE_SWITCH float spchTmp2[640]; int16_t L_resamp; #endif int16_t i, j; float spchTmp[L_FRAME32k], spchTmp2[L_FRAME32k]; int16_t i, j, L_resamp; int16_t startB, endB; float *realBufferFlipped[CLDFB_NO_COL_MAX]; float *imagBufferFlipped[CLDFB_NO_COL_MAX]; float realBufferTmp[CLDFB_NO_COL_MAX][20]; float imagBufferTmp[CLDFB_NO_COL_MAX][20]; int16_t ts, nB, uB; float sign; float lbEner, v, t; float regression; float sign, lbEner, v, t, regression; const float *thr, *regV; int16_t Sample_Delay_SWB_BWE32k, lMemRecalc32k, dft_ovl32k; Loading Loading @@ -681,11 +675,7 @@ void swb_pre_proc( } else { #ifdef FIX_I102_SWB_TBE_SWITCH if ( ( st->bwidth == FB || st->core == ACELP_CORE ) && ( st->element_mode == EVS_MONO ) ) #else if ( st->bwidth == FB || st->core == ACELP_CORE || ( st->element_mode == IVAS_CPE_DFT && input_Fs == 48000 ) ) #endif { set_f( hBWE_TD->old_speech_shb, 0, L_LOOK_16k + L_SUBFR16k ); set_f( shb_speech, 0, L_FRAME16k ); /* shb_speech for FB/SWB BWE_HIGHRATE is not used at 64kbps */ Loading @@ -697,16 +687,9 @@ void swb_pre_proc( st->hBWE_TD->prev_pow_exc16kWhtnd = 1.0f; st->hBWE_TD->prev_mix_factor = 1.0f; st->hBWE_TD->prev_Env_error = 0.0f; #ifndef FIX_I102_SWB_TBE_SWITCH if ( st->element_mode == IVAS_CPE_DFT ) { set_f( hCPE->hStereoDft->output_mem_dmx_16k_shb, 0, STEREO_DFT_OVL_16k ); } #endif } else { #ifdef FIX_I102_SWB_TBE_SWITCH if ( st->element_mode == IVAS_CPE_DFT ) { if ( st->L_frame == L_FRAME ) Loading Loading @@ -742,15 +725,7 @@ void swb_pre_proc( spchTmp[i] = -spchTmp[i]; } } #else /* flip the spectrm */ mvr2r( new_swb_speech, spchTmp, L_FRAME32k ); for ( i = 0; i < L_FRAME32k; i = i + 2 ) { spchTmp[i] = -spchTmp[i]; } #endif Decimate_allpass_steep( spchTmp, hBWE_TD->state_ana_filt_shb, L_FRAME32k, shb_speech ); mvr2r( shb_speech + L_FRAME16k - ( L_LOOK_16k + L_SUBFR16k ), hBWE_TD->old_speech_shb, L_LOOK_16k + L_SUBFR16k ); Loading @@ -770,23 +745,16 @@ void swb_pre_proc( /* Reset CLDFB synthesis buffer */ set_f( st->cldfbSynTd->cldfb_state, 0.0f, st->cldfbSynTd->p_filter_length ); } #ifdef FIX_I102_SWB_TBE_SWITCH else { hCPE->hStereoDft->flip_sign = -hCPE->hStereoDft->flip_sign; /* Make sure sign is updated even if DFT SHB target is not generated */ } #endif } /* Memory reset to compensate for 0.9375 ms offset when transitioning from IO to SWB */ /* When switching from n >1 to n = 1, we keep the enc/dec delay as 8.75/3.25 and below code not needed; only when n = 1 start, it will be 9.6875/2.3125 in that case this reset is needed for IO->BWE.*/ #ifdef FIX_I102_SWB_TBE_SWITCH if ( st->last_extl == -1 && st->element_mode == EVS_MONO ) #else /* IVAS_fmToDo: revisit for IVAS (the condition is currently entered for both TD and DFT stereo - is it desirable?) */ if ( st->last_extl == -1 ) #endif { delay = NS2SA( input_Fs, DELAY_FIR_RESAMPL_NS ); for ( i = 0; i < delay; i++ ) Loading