/*#define ITD_WINNER_GAIN_MODIFY *//* ITD optimization - WORK IN PROGRESS */
/*#define FIX_I4_OL_PITCH*//* fix open-loop pitch used for EVS core switching */
/*#define FIX_IVAS_185_MDCT_ST_PLC_FADEOUT*//* IVAS-185 fix bug in TCX-PLC fadeout for MDCT-Stereo and improve fadeout by fading to background noise instead of white noise */
/*#define FIX_I1_113*//* under review : MCT bit distribution optimization for SBA high bitrates*/
#define SPAR_SCALING_HARMONIZATION /* Issue 80: Changes to harmonize scaling in spar */
#define FIX_I98_HANDLES_TO_NULL /* Issue 98: do the setting of all handles to NULL in one place */
#define FIX_I106_TDREND_5MS /* Issue 106: 5 ms update rate in TD object renderer */
#define QUANTISE_REAL_FCN_CLEAN_UP /*Clean up the ivas_quantise_real_values() function*/
#define FIX_I74_BW_LIMITATION_ALT /* issue 74: Propagate bitrate induced BW limitation to hEncoderConfig. Ensures BE between explicit BW limitation using "-max_band <BW>" and BW limited by bitrate; alternative fix */
#define FIX_I74_CLEANING /* issue 74: remove redundant function call in ivas_cpe_enc() */
#define ALIGN_SID_SIZE /* Issue 111: make all DTX modes use one SID frame bitrate (5.2 kbps) */
#define FIX_135_MDCT_STEREO_MODE_UNINITIALIZED /* Issue 135: fix uninitialized value usage in SBA MDCT-Stereo core with PLC */
#define SPAR_SCALING_HARMONIZATION /* issue 80: Changes to harmonize scaling in spar */
#define ALIGN_SID_SIZE /* Issue 111: make all DTX modes use one SID frame bitrate (5.2 kbps) */
#define FIX_135_MDCT_STEREO_MODE_UNINITIALIZED /* Issue 135: fix uninitialized value usage in SBA MDCT-Stereo core with PLC */
/* ################## End DEVELOPMENT switches ######################### */