Loading lib_com/ivas_prot.h +14 −0 Original line number Diff line number Diff line Loading @@ -3811,12 +3811,18 @@ void FdCngDecodeDiracMDCTStereoSID( ivas_error ivas_spar_enc_open( Encoder_Struct *st_ivas /* i/o: IVAS encoder handle */ #ifdef SBA_BR_SWITCHING_CLEAN_UP ,const int16_t spar_reconfig_flag #endif ); void ivas_spar_enc_close( SPAR_ENC_HANDLE hSpar, /* i/o: SPAR encoder handle */ const int32_t input_Fs, /* i : input sampling rate */ const int16_t nchan_inp /* i : number of input channels */ #ifdef SBA_BR_SWITCHING_CLEAN_UP ,const int16_t spar_reconfig_flag #endif ); ivas_error ivas_spar_enc( Loading @@ -3829,11 +3835,19 @@ ivas_error ivas_spar_enc( ivas_error ivas_spar_dec_open( Decoder_Struct *st_ivas /* i/o: IVAS decoder handle */ #ifdef SBA_BR_SWITCHING_CLEAN_UP , const int16_t spar_reconfig_flag #endif ); void ivas_spar_dec_close( SPAR_DEC_HANDLE hSpar, /* i/o: SPAR decoder handle */ const int32_t output_Fs /* i : output sampling rate */ #ifdef SBA_BR_SWITCHING_CLEAN_UP , const int16_t spar_reconfig_flag #endif ); ivas_error ivas_spar_dec( Loading lib_com/options.h +1 −0 Original line number Diff line number Diff line Loading @@ -145,6 +145,7 @@ #ifdef SBA_BR_SWITCHING #define SBA_BR_SWITCHING_RECONFIG /* Issue 114: Changes for SBA bitrate switching with reconfiguration for bitrates with different number of transport channels*/ #define SBA_BR_SWITCHING_COMPLEXITY_FIX /* VA: fix complexity overhead */ #define SBA_BR_SWITCHING_CLEAN_UP #endif #define FIX_I59_DELAY_ROUNDING /* Issue 59: rounding in sample domain instead of nanosec for IVAS_ENC_GetDelay() and IVAS_DEC_GetDelay() */ #define FIX_FIX_I59 /* Issue 59: small fix concerning LFE delay rounding */ Loading lib_dec/ivas_init_dec.c +8 −0 Original line number Diff line number Diff line Loading @@ -813,7 +813,11 @@ ivas_error ivas_init_decoder( { if ( st_ivas->sba_mode == SBA_MODE_SPAR ) { #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( ( error = ivas_spar_dec_open( st_ivas, 0 ) ) != IVAS_ERR_OK ) #else if ( ( error = ivas_spar_dec_open( st_ivas ) ) != IVAS_ERR_OK ) #endif { return error; } Loading Loading @@ -1673,7 +1677,11 @@ void ivas_destroy_dec( /* Spar handle */ if ( st_ivas->hSpar != NULL ) { #ifdef SBA_BR_SWITCHING_CLEAN_UP ivas_spar_dec_close( st_ivas->hSpar, st_ivas->hDecoderConfig->output_Fs, 0 ); #else ivas_spar_dec_close( st_ivas->hSpar, st_ivas->hDecoderConfig->output_Fs ); #endif st_ivas->hSpar = NULL; } Loading lib_dec/ivas_sba_dec.c +70 −1 Original line number Diff line number Diff line Loading @@ -625,7 +625,11 @@ ivas_error ivas_sba_dec_reconfigure( if ( st_ivas->sba_mode != SBA_MODE_SPAR ) { #ifndef SBA_BR_SWITCHING_CLEAN_UP ivas_spar_dec_close( st_ivas->hSpar, hDecoderConfig->output_Fs ); #else ivas_spar_dec_close( st_ivas->hSpar, hDecoderConfig->output_Fs, 0 ); #endif st_ivas->hSpar = NULL; if ( ( error = ivas_dirac_sba_config( st_ivas->hQMetaData, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &st_ivas->element_mode_init, ivas_total_brate, st_ivas->sba_analysis_order, st_ivas->sba_mode, -1 ) ) != IVAS_ERR_OK ) Loading @@ -637,20 +641,24 @@ ivas_error ivas_sba_dec_reconfigure( } else { #ifdef SBA_BR_SWITCHING_CLEAN_UP int16_t sba_order_internal, nchan_internal; #else #ifdef SBA_BR_SWITCHING_RECONFIG int16_t i, sba_order_internal, nchan_internal; #else int16_t sba_order_internal; #endif DIRAC_DEC_HANDLE hDirAC = st_ivas->hDirAC; #endif SPAR_DEC_HANDLE hSpar = st_ivas->hSpar; sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER ); #ifdef SBA_BR_SWITCHING_RECONFIG nchan_internal = ivas_sba_get_nchan_metadata( sba_order_internal ); #ifndef SBA_BR_SWITCHING_CLEAN_UP if ( hSpar != NULL && nchan_transport_old != ivas_get_sba_num_TCs( ivas_total_brate, sba_order_internal ) ) { // VE: dirty patch -> reconfiguration of SPAR modules should be used instead !! IVAS_FB_CFG *fb_cfg; int16_t active_w_mixing; Loading Loading @@ -708,7 +716,47 @@ ivas_error ivas_sba_dec_reconfigure( } hSpar->i_subframe = 0; } #else if ( hSpar != NULL ) { if ( hDecoderConfig->ivas_total_brate == PCA_BRATE && sba_order_internal == 1 ) { if ( ( hSpar->hPCA = (PCA_DEC_STATE *) malloc( sizeof( PCA_DEC_STATE ) ) ) == NULL ) { return IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for PCA decoder" ); } ivas_pca_dec_init( hSpar->hPCA ); } else if ( hSpar->hPCA != NULL ) { free( st_ivas->hSpar->hPCA ); hSpar->hPCA = NULL; } if ( nchan_transport_old != ivas_get_sba_num_TCs( ivas_total_brate, sba_order_internal ) ) { ivas_spar_dec_close( st_ivas->hSpar, hDecoderConfig->output_Fs, 1 ); if ( ( error = ivas_spar_dec_open( st_ivas, 1 ) ) != IVAS_ERR_OK ) { return error; } } ivas_spar_config( ivas_total_brate, sba_order_internal, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &hSpar->core_nominal_brate, st_ivas->sid_format ); } else { if ( ( error = ivas_spar_dec_open( st_ivas, 0 ) ) != IVAS_ERR_OK ) { return error; } } hSpar = st_ivas->hSpar; st_ivas->sba_dirac_stereo_flag = 0; #endif #endif #ifndef SBA_BR_SWITCHING_CLEAN_UP /* PCA handle */ if ( hSpar != NULL ) { Loading Loading @@ -768,6 +816,7 @@ ivas_error ivas_sba_dec_reconfigure( { return error; } #endif } if ( st_ivas->nchan_transport == 1 ) { Loading Loading @@ -849,6 +898,25 @@ ivas_error ivas_sba_dec_reconfigure( ivas_dirac_dec_close_binaural_data( &st_ivas->hDiracDecBin ); } #ifdef SBA_BR_SWITCHING_RECONFIG #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( ( ( st_ivas->renderer_type != RENDERER_DISABLE ) && ( st_ivas->renderer_type != RENDERER_SBA_LINEAR_DEC ) ) || ( sba_mode_old != st_ivas->sba_mode ) || ( st_ivas->sba_mode == SBA_MODE_SPAR ) ) { DIRAC_CONFIG_FLAG flag_config; flag_config = DIRAC_OPEN; if ( st_ivas->hDirAC != NULL ) { flag_config = DIRAC_RECONFIGURE_MODE; if ( ( sba_mode_old == st_ivas->sba_mode ) && ( st_ivas->sba_mode != SBA_MODE_SPAR ) ) { flag_config = DIRAC_RECONFIGURE; } } if ( ( error = ivas_dirac_dec_config( st_ivas, flag_config ) ) != IVAS_ERR_OK ) { return error; } } #else if ( ( ( st_ivas->renderer_type != RENDERER_DISABLE ) && ( st_ivas->renderer_type != RENDERER_SBA_LINEAR_DEC ) ) || ( sba_mode_old != st_ivas->sba_mode ) ) { DIRAC_CONFIG_FLAG flag_config; Loading @@ -868,6 +936,7 @@ ivas_error ivas_sba_dec_reconfigure( return error; } } #endif #else #ifdef SBA_BR_SWITCHING if ( ( st_ivas->renderer_type != RENDERER_DISABLE && st_ivas->renderer_type != RENDERER_SBA_LINEAR_DEC ) ) Loading lib_dec/ivas_spar_decoder.c +77 −47 Original line number Diff line number Diff line Loading @@ -61,6 +61,10 @@ static void ivas_spar_dec_MD( Decoder_Struct *st_ivas, Decoder_State *st0 ); ivas_error ivas_spar_dec_open( Decoder_Struct *st_ivas /* i/o: IVAS decoder handle */ #ifdef SBA_BR_SWITCHING_CLEAN_UP , const int16_t spar_reconfig_flag #endif ) { SPAR_DEC_HANDLE hSpar; Loading @@ -73,13 +77,19 @@ ivas_error ivas_spar_dec_open( error = IVAS_ERR_OK; sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER ); num_channels_internal = ivas_sba_get_nchan_metadata( sba_order_internal ); #ifdef SBA_BR_SWITCHING_CLEAN_UP hSpar = st_ivas->hSpar; if ( !spar_reconfig_flag ) { #endif /* SPAR decoder handle */ if ( ( hSpar = (SPAR_DEC_HANDLE) malloc( sizeof( SPAR_DEC_DATA ) ) ) == NULL ) { return IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for SPAR decoder" ); } #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif output_Fs = st_ivas->hDecoderConfig->output_Fs; /* TD decorr. */ Loading Loading @@ -110,7 +120,10 @@ ivas_error ivas_spar_dec_open( { return error; } #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( !spar_reconfig_flag ) { #endif /* AGC handle */ if ( ( error = ivas_spar_agc_dec_open( &hSpar->hAgcDec, output_Fs ) ) != IVAS_ERR_OK ) { Loading @@ -128,7 +141,9 @@ ivas_error ivas_spar_dec_open( ivas_pca_dec_init( hSpar->hPCA ); } #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif /* mixer_mat intitialization */ for ( i = 0; i < num_channels_internal; i++ ) { Loading @@ -145,7 +160,10 @@ ivas_error ivas_spar_dec_open( } } hSpar->i_subframe = 0; #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( !spar_reconfig_flag ) { #endif /*-----------------------------------------------------------------* * Configuration - set SPAR high-level parameters *-----------------------------------------------------------------*/ Loading @@ -168,7 +186,9 @@ ivas_error ivas_spar_dec_open( ivas_output_init( &( st_ivas->hTransSetup ), st_ivas->transport_config ); st_ivas->hSpar = hSpar; #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif return error; } Loading @@ -182,6 +202,10 @@ ivas_error ivas_spar_dec_open( void ivas_spar_dec_close( SPAR_DEC_HANDLE hSpar, /* i/o: SPAR decoder handle */ const int32_t output_Fs /* i : output sampling rate */ #ifdef SBA_BR_SWITCHING_CLEAN_UP , const int16_t spar_reconfig_flag #endif ) { if ( hSpar != NULL ) Loading @@ -194,7 +218,10 @@ void ivas_spar_dec_close( /* FB mixer handle */ ivas_FB_mixer_close( &hSpar->hFbMixer, output_Fs ); #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( !spar_reconfig_flag ) { #endif /* AGC */ ivas_spar_agc_dec_close( &hSpar->hAgcDec ); Loading @@ -207,6 +234,9 @@ void ivas_spar_dec_close( free( hSpar ); hSpar = NULL; #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif } return; Loading Loading
lib_com/ivas_prot.h +14 −0 Original line number Diff line number Diff line Loading @@ -3811,12 +3811,18 @@ void FdCngDecodeDiracMDCTStereoSID( ivas_error ivas_spar_enc_open( Encoder_Struct *st_ivas /* i/o: IVAS encoder handle */ #ifdef SBA_BR_SWITCHING_CLEAN_UP ,const int16_t spar_reconfig_flag #endif ); void ivas_spar_enc_close( SPAR_ENC_HANDLE hSpar, /* i/o: SPAR encoder handle */ const int32_t input_Fs, /* i : input sampling rate */ const int16_t nchan_inp /* i : number of input channels */ #ifdef SBA_BR_SWITCHING_CLEAN_UP ,const int16_t spar_reconfig_flag #endif ); ivas_error ivas_spar_enc( Loading @@ -3829,11 +3835,19 @@ ivas_error ivas_spar_enc( ivas_error ivas_spar_dec_open( Decoder_Struct *st_ivas /* i/o: IVAS decoder handle */ #ifdef SBA_BR_SWITCHING_CLEAN_UP , const int16_t spar_reconfig_flag #endif ); void ivas_spar_dec_close( SPAR_DEC_HANDLE hSpar, /* i/o: SPAR decoder handle */ const int32_t output_Fs /* i : output sampling rate */ #ifdef SBA_BR_SWITCHING_CLEAN_UP , const int16_t spar_reconfig_flag #endif ); ivas_error ivas_spar_dec( Loading
lib_com/options.h +1 −0 Original line number Diff line number Diff line Loading @@ -145,6 +145,7 @@ #ifdef SBA_BR_SWITCHING #define SBA_BR_SWITCHING_RECONFIG /* Issue 114: Changes for SBA bitrate switching with reconfiguration for bitrates with different number of transport channels*/ #define SBA_BR_SWITCHING_COMPLEXITY_FIX /* VA: fix complexity overhead */ #define SBA_BR_SWITCHING_CLEAN_UP #endif #define FIX_I59_DELAY_ROUNDING /* Issue 59: rounding in sample domain instead of nanosec for IVAS_ENC_GetDelay() and IVAS_DEC_GetDelay() */ #define FIX_FIX_I59 /* Issue 59: small fix concerning LFE delay rounding */ Loading
lib_dec/ivas_init_dec.c +8 −0 Original line number Diff line number Diff line Loading @@ -813,7 +813,11 @@ ivas_error ivas_init_decoder( { if ( st_ivas->sba_mode == SBA_MODE_SPAR ) { #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( ( error = ivas_spar_dec_open( st_ivas, 0 ) ) != IVAS_ERR_OK ) #else if ( ( error = ivas_spar_dec_open( st_ivas ) ) != IVAS_ERR_OK ) #endif { return error; } Loading Loading @@ -1673,7 +1677,11 @@ void ivas_destroy_dec( /* Spar handle */ if ( st_ivas->hSpar != NULL ) { #ifdef SBA_BR_SWITCHING_CLEAN_UP ivas_spar_dec_close( st_ivas->hSpar, st_ivas->hDecoderConfig->output_Fs, 0 ); #else ivas_spar_dec_close( st_ivas->hSpar, st_ivas->hDecoderConfig->output_Fs ); #endif st_ivas->hSpar = NULL; } Loading
lib_dec/ivas_sba_dec.c +70 −1 Original line number Diff line number Diff line Loading @@ -625,7 +625,11 @@ ivas_error ivas_sba_dec_reconfigure( if ( st_ivas->sba_mode != SBA_MODE_SPAR ) { #ifndef SBA_BR_SWITCHING_CLEAN_UP ivas_spar_dec_close( st_ivas->hSpar, hDecoderConfig->output_Fs ); #else ivas_spar_dec_close( st_ivas->hSpar, hDecoderConfig->output_Fs, 0 ); #endif st_ivas->hSpar = NULL; if ( ( error = ivas_dirac_sba_config( st_ivas->hQMetaData, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &st_ivas->element_mode_init, ivas_total_brate, st_ivas->sba_analysis_order, st_ivas->sba_mode, -1 ) ) != IVAS_ERR_OK ) Loading @@ -637,20 +641,24 @@ ivas_error ivas_sba_dec_reconfigure( } else { #ifdef SBA_BR_SWITCHING_CLEAN_UP int16_t sba_order_internal, nchan_internal; #else #ifdef SBA_BR_SWITCHING_RECONFIG int16_t i, sba_order_internal, nchan_internal; #else int16_t sba_order_internal; #endif DIRAC_DEC_HANDLE hDirAC = st_ivas->hDirAC; #endif SPAR_DEC_HANDLE hSpar = st_ivas->hSpar; sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER ); #ifdef SBA_BR_SWITCHING_RECONFIG nchan_internal = ivas_sba_get_nchan_metadata( sba_order_internal ); #ifndef SBA_BR_SWITCHING_CLEAN_UP if ( hSpar != NULL && nchan_transport_old != ivas_get_sba_num_TCs( ivas_total_brate, sba_order_internal ) ) { // VE: dirty patch -> reconfiguration of SPAR modules should be used instead !! IVAS_FB_CFG *fb_cfg; int16_t active_w_mixing; Loading Loading @@ -708,7 +716,47 @@ ivas_error ivas_sba_dec_reconfigure( } hSpar->i_subframe = 0; } #else if ( hSpar != NULL ) { if ( hDecoderConfig->ivas_total_brate == PCA_BRATE && sba_order_internal == 1 ) { if ( ( hSpar->hPCA = (PCA_DEC_STATE *) malloc( sizeof( PCA_DEC_STATE ) ) ) == NULL ) { return IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for PCA decoder" ); } ivas_pca_dec_init( hSpar->hPCA ); } else if ( hSpar->hPCA != NULL ) { free( st_ivas->hSpar->hPCA ); hSpar->hPCA = NULL; } if ( nchan_transport_old != ivas_get_sba_num_TCs( ivas_total_brate, sba_order_internal ) ) { ivas_spar_dec_close( st_ivas->hSpar, hDecoderConfig->output_Fs, 1 ); if ( ( error = ivas_spar_dec_open( st_ivas, 1 ) ) != IVAS_ERR_OK ) { return error; } } ivas_spar_config( ivas_total_brate, sba_order_internal, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &hSpar->core_nominal_brate, st_ivas->sid_format ); } else { if ( ( error = ivas_spar_dec_open( st_ivas, 0 ) ) != IVAS_ERR_OK ) { return error; } } hSpar = st_ivas->hSpar; st_ivas->sba_dirac_stereo_flag = 0; #endif #endif #ifndef SBA_BR_SWITCHING_CLEAN_UP /* PCA handle */ if ( hSpar != NULL ) { Loading Loading @@ -768,6 +816,7 @@ ivas_error ivas_sba_dec_reconfigure( { return error; } #endif } if ( st_ivas->nchan_transport == 1 ) { Loading Loading @@ -849,6 +898,25 @@ ivas_error ivas_sba_dec_reconfigure( ivas_dirac_dec_close_binaural_data( &st_ivas->hDiracDecBin ); } #ifdef SBA_BR_SWITCHING_RECONFIG #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( ( ( st_ivas->renderer_type != RENDERER_DISABLE ) && ( st_ivas->renderer_type != RENDERER_SBA_LINEAR_DEC ) ) || ( sba_mode_old != st_ivas->sba_mode ) || ( st_ivas->sba_mode == SBA_MODE_SPAR ) ) { DIRAC_CONFIG_FLAG flag_config; flag_config = DIRAC_OPEN; if ( st_ivas->hDirAC != NULL ) { flag_config = DIRAC_RECONFIGURE_MODE; if ( ( sba_mode_old == st_ivas->sba_mode ) && ( st_ivas->sba_mode != SBA_MODE_SPAR ) ) { flag_config = DIRAC_RECONFIGURE; } } if ( ( error = ivas_dirac_dec_config( st_ivas, flag_config ) ) != IVAS_ERR_OK ) { return error; } } #else if ( ( ( st_ivas->renderer_type != RENDERER_DISABLE ) && ( st_ivas->renderer_type != RENDERER_SBA_LINEAR_DEC ) ) || ( sba_mode_old != st_ivas->sba_mode ) ) { DIRAC_CONFIG_FLAG flag_config; Loading @@ -868,6 +936,7 @@ ivas_error ivas_sba_dec_reconfigure( return error; } } #endif #else #ifdef SBA_BR_SWITCHING if ( ( st_ivas->renderer_type != RENDERER_DISABLE && st_ivas->renderer_type != RENDERER_SBA_LINEAR_DEC ) ) Loading
lib_dec/ivas_spar_decoder.c +77 −47 Original line number Diff line number Diff line Loading @@ -61,6 +61,10 @@ static void ivas_spar_dec_MD( Decoder_Struct *st_ivas, Decoder_State *st0 ); ivas_error ivas_spar_dec_open( Decoder_Struct *st_ivas /* i/o: IVAS decoder handle */ #ifdef SBA_BR_SWITCHING_CLEAN_UP , const int16_t spar_reconfig_flag #endif ) { SPAR_DEC_HANDLE hSpar; Loading @@ -73,13 +77,19 @@ ivas_error ivas_spar_dec_open( error = IVAS_ERR_OK; sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER ); num_channels_internal = ivas_sba_get_nchan_metadata( sba_order_internal ); #ifdef SBA_BR_SWITCHING_CLEAN_UP hSpar = st_ivas->hSpar; if ( !spar_reconfig_flag ) { #endif /* SPAR decoder handle */ if ( ( hSpar = (SPAR_DEC_HANDLE) malloc( sizeof( SPAR_DEC_DATA ) ) ) == NULL ) { return IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for SPAR decoder" ); } #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif output_Fs = st_ivas->hDecoderConfig->output_Fs; /* TD decorr. */ Loading Loading @@ -110,7 +120,10 @@ ivas_error ivas_spar_dec_open( { return error; } #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( !spar_reconfig_flag ) { #endif /* AGC handle */ if ( ( error = ivas_spar_agc_dec_open( &hSpar->hAgcDec, output_Fs ) ) != IVAS_ERR_OK ) { Loading @@ -128,7 +141,9 @@ ivas_error ivas_spar_dec_open( ivas_pca_dec_init( hSpar->hPCA ); } #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif /* mixer_mat intitialization */ for ( i = 0; i < num_channels_internal; i++ ) { Loading @@ -145,7 +160,10 @@ ivas_error ivas_spar_dec_open( } } hSpar->i_subframe = 0; #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( !spar_reconfig_flag ) { #endif /*-----------------------------------------------------------------* * Configuration - set SPAR high-level parameters *-----------------------------------------------------------------*/ Loading @@ -168,7 +186,9 @@ ivas_error ivas_spar_dec_open( ivas_output_init( &( st_ivas->hTransSetup ), st_ivas->transport_config ); st_ivas->hSpar = hSpar; #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif return error; } Loading @@ -182,6 +202,10 @@ ivas_error ivas_spar_dec_open( void ivas_spar_dec_close( SPAR_DEC_HANDLE hSpar, /* i/o: SPAR decoder handle */ const int32_t output_Fs /* i : output sampling rate */ #ifdef SBA_BR_SWITCHING_CLEAN_UP , const int16_t spar_reconfig_flag #endif ) { if ( hSpar != NULL ) Loading @@ -194,7 +218,10 @@ void ivas_spar_dec_close( /* FB mixer handle */ ivas_FB_mixer_close( &hSpar->hFbMixer, output_Fs ); #ifdef SBA_BR_SWITCHING_CLEAN_UP if ( !spar_reconfig_flag ) { #endif /* AGC */ ivas_spar_agc_dec_close( &hSpar->hAgcDec ); Loading @@ -207,6 +234,9 @@ void ivas_spar_dec_close( free( hSpar ); hSpar = NULL; #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif } return; Loading