Loading NR_Inter-band_DC_FR1/DC_n1A-n77A.json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } } NR_Inter-band_DC_FR1/DC_n1A-n79A.json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } } NR_Inter-band_DC_FR1/DC_n28A-n77A.json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } } NR_Inter-band_DC_FR1/DC_n28A-n78(2A).json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } } NR_Inter-band_DC_FR1/DC_n28A-n78A.json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } } Loading
NR_Inter-band_DC_FR1/DC_n1A-n77A.json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } }
NR_Inter-band_DC_FR1/DC_n1A-n79A.json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } }
NR_Inter-band_DC_FR1/DC_n28A-n77A.json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } }
NR_Inter-band_DC_FR1/DC_n28A-n78(2A).json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } }
NR_Inter-band_DC_FR1/DC_n28A-n78A.json +1 −1 Original line number Diff line number Diff line Loading @@ -6,6 +6,6 @@ } ], "notes": { "simultaneousRxTx": true "interBandNrDcSimRxTx": true } }