Loading Inter-band_DC_FR1/DC_41A_n1A.json +1 −2 Original line number Diff line number Diff line Loading @@ -9,6 +9,5 @@ } ], "singleUlAllowed": "No", "dlInterruptionsAllowed": "DC_41A_n1A DC_41C_n1A" "dlInterruptionsAllowed": "DC_41A_n1A, DC_41C_n1A" } Inter-band_DC_FR1/DC_41C_n1A.json +1 −2 Original line number Diff line number Diff line Loading @@ -9,6 +9,5 @@ } ], "singleUlAllowed": "No", "dlInterruptionsAllowed": "DC_41A_n1A DC_41C_n1A" "dlInterruptionsAllowed": "DC_41A_n1A, DC_41C_n1A" } Loading
Inter-band_DC_FR1/DC_41A_n1A.json +1 −2 Original line number Diff line number Diff line Loading @@ -9,6 +9,5 @@ } ], "singleUlAllowed": "No", "dlInterruptionsAllowed": "DC_41A_n1A DC_41C_n1A" "dlInterruptionsAllowed": "DC_41A_n1A, DC_41C_n1A" }
Inter-band_DC_FR1/DC_41C_n1A.json +1 −2 Original line number Diff line number Diff line Loading @@ -9,6 +9,5 @@ } ], "singleUlAllowed": "No", "dlInterruptionsAllowed": "DC_41A_n1A DC_41C_n1A" "dlInterruptionsAllowed": "DC_41A_n1A, DC_41C_n1A" }