Commit 1b3d196a authored by emerit's avatar emerit
Browse files

Merge branch 'main' into update_crend_v2

parents da9d293d e43f1385

.gitlab-ci.yml

+36 −0
Original line number Diff line number Diff line
@@ -121,6 +121,13 @@ stages: 
    echo "Commit time was $CI_COMMIT_TIMESTAMP"

    date | xargs echo "System time is"



.print-common-info-windows: &print-common-info-windows

  - |

    echo "Printing common information for build job."

    echo "Current job is run on commit $CI_COMMIT_SHA"

    echo "Commit time was $CI_COMMIT_TIMESTAMP"

    ("echo 'System time is'", "Get-Date -Format 'dddd dd/MM/yyyy HH:mm K'") | Invoke-Expression



.activate-debug-mode-info-if-set: &activate-debug-mode-info-if-set

  - if [ "$BUILD_WITH_DEBUG_MODE_INFO" = "true" ]; then

  -   sed -i.bak -e "s/\/\*\ *\(#define\ *DEBUGGING\ *\)\*\//\1/g" lib_com/options.h
@@ -194,6 +201,10 @@ stages: 
.activate-Werror-linux: &activate-Werror-linux

  - sed -i.bak "s/^# \(CFLAGS += -Werror\)/\1/" Makefile



.activate-WX-windows: &activate-WX-windows

  - (Get-Content -Path "CMakeLists.txt") -replace '# \(add_compile_options\("\/WX"\)\)', '$1' | Set-Content -Path "CMakeLists.txt"

  - Get-ChildItem -Path "Workspace_msvc" -Filter "*.vcxproj" | ForEach-Object { (Get-Content -Path $_.FullName) -replace '<TreatWarningAsError>false', '<TreatWarningAsError>true' | Set-Content -Path $_.FullName }



.rules-pytest-to-ref-short:

  rules:

    - if: $CI_PIPELINE_SOURCE == 'web' && $MANUAL_PIPELINE_TYPE == "pytest-compare"
@@ -260,6 +271,13 @@ stages: 
  tags:

    - ivas-basop-linux



.build-job-windows:

  stage: build

  needs: []

  timeout: "4 minutes"

  tags:

    - ivas-windows



# template for test jobs on linux that need the TESTV_DIR

.test-job-linux-needs-testv-dir:

  extends: .test-job-linux
@@ -715,6 +733,24 @@ build-codec-linux-debugging-make: 
    - *activate-debug-mode-info-if-set

    - make -j



build-codec-windows-msbuild:

  rules:

    - if: $CI_PIPELINE_SOURCE == 'web'

    - if: $CI_PIPELINE_SOURCE == 'push' && $CI_COMMIT_BRANCH == $CI_DEFAULT_BRANCH

    - if: $CI_PIPELINE_SOURCE == 'merge_request_event' # trigger build job for all MRs

    - if: $CI_PIPELINE_SOURCE == 'schedule'

    - if: $CI_PIPELINE_SOURCE == 'push'

      when: never

  extends:

    - .build-job-windows

  timeout: "7 minutes"

  tags:

    - ivas-windows

  script:

    - *print-common-info-windows

    - *activate-WX-windows

    - MSBuild.exe -maxcpucount .\Workspace_msvc\Workspace_msvc.sln /property:Configuration=Debug



# ---------------------------------------------------------------

# Short test jobs that run in merge request pipelines

# ---------------------------------------------------------------

lib_com/basop_util.c

+8 −1
Original line number Diff line number Diff line
@@ -405,7 +405,9 @@ static Word16 ISqrt16_common( Word16 m, 


    /* handle even exponents */

    if ( s_and( e, 1 ) == 0 )

    {

        m = mult_r( m, 0x5a82 );

    }



    return m;

}
@@ -420,8 +422,11 @@ static Word32 ISqrt32_common( Word32 m, 
#endif



    assert( m >= 0x40000000 );



#ifdef BASOP_NOGLOB_DECLARE_LOCAL

    m16 = round_fx_o( m, &Overflow );

#else

    m16 = round_fx( m );

#endif



    /* get table index (upper 6 bits minus 32) */

    /* index = (m16 >> 25) - 32; */
@@ -435,7 +440,9 @@ static Word32 ISqrt32_common( Word32 m, 


    /* handle even exponents */

    if ( s_and( e, 1 ) == 0 )

    {

        m = Mpy_32_16_1( m, 0x5a82 );

    }



    return m;

}

lib_com/ivas_spar_com.c

+5 −1
Original line number Diff line number Diff line
@@ -3836,7 +3836,11 @@ void ivas_compute_spar_params_fx( 
            }

            ELSE

            {

#ifdef FIX_11_1_IVAS_SPAR_DEC_UPMIXER_SF_RND_COEFFS

                hSparMd->band_coeffs[b + ( i_ts * IVAS_MAX_NUM_BANDS )].pred_re_fx[i] = L_shr_r( hSparMd->band_coeffs[b + ( i_ts * IVAS_MAX_NUM_BANDS )].pred_re_fx[i], sub( tmp, 22 ) ); // q22

#else

                hSparMd->band_coeffs[b + ( i_ts * IVAS_MAX_NUM_BANDS )].pred_re_fx[i] = L_shr( hSparMd->band_coeffs[b + ( i_ts * IVAS_MAX_NUM_BANDS )].pred_re_fx[i], sub( tmp, 22 ) ); // q22

#endif

                move32();

            }

        }

lib_com/options.h

100644 → 100755
+9 −0
Original line number Diff line number Diff line
@@ -151,9 +151,18 @@ 
#define FIX_1010_OPT_GIVENS_INV                 /* FhG: SVD complexity optimizations (non-be) */

#define FIX_1010_OPT_NORM_NOSAT                 /* FhG: SVD complexity optimizations (non-be) */

#define FIX_1010_OPT_SEC_SINGLE_RESCALE         /* FhG: SVD complexity optimizations (non-be) */

#define FIX_1072_SPEEDUP_matrixTransp2Mul_fx    /* FhG: complexity optimization (non-be)      */

#define FIX_1072_REDUCE_DIVS                    /* FhG: complexity optimization (non-be)      */

#define FIX_ISSUE_1230                          /* Ittiam: Fix for issue 1230: Basop Enc audible differences and distortion @16kbps */

#define NONBE_1211_DTX_BR_SWITCHING             /* VA: port float issue 1211: fix crash in MASA DTX bitrate switching */

#define FIX_1189_GSC_IVAS_OMASA                 /* VA: Fix for issue 1189: Bitstream desynchornization due to reading/writing of the GSC_IVAS_mode parameter */

#define FIX_1101_IVAS_SPAR_DEC_UPMIXER_SF       /* FhG: fix for issue 1101: complexity of spar dec upmixer */

/* Note: each compile switch (FIX_1101_...) is independent from the other ones */

#define FIX_1101_IVAS_SPAR_DEC_UPMIXER_SF_USE_MADD_ADD_WEIGHTS  /* FhG: Defines 1.0f-weight variables, uses Madd operation instead of L_add_sat */

#define FIX_1101_IVAS_SPAR_DEC_UPMIXER_SF_SPLIT_LOOPS           /* FhG: Splits single loop with IF-statements into two low-complex loops */

#define FIX_1101_IVAS_SPAR_DEC_UPMIXER_SF_HQ_CONSTANTS          /* FhG: IMPROVE PRECISION: Uses 1/6 and 1/20 in full-precise Q31 constants instead of Q15 */

#define FIX_1101_IVAS_SPAR_DEC_UPMIXER_SF_USE_UNIQUE_SHL        /* FhG: Uses unique shift amount in each loop iteration */

#define FIX_11_1_IVAS_SPAR_DEC_UPMIXER_SF_RND_COEFFS            /* FhG  ivas_spar_com.c: Zeroes very small negative coeffs via L_shr_r (was L_shr) */

#define FIX_ISSUE_1237                          /* VA: replacement of Copy_Scale_sig_16_32_DEPREC() that are doing 16 bits left shift by Copy_Scale_sig_16_32_no_sat() */

#define FIX_ISSUE_1237_KEEP_EVS_BE              /* VA: Fix to keep EVS bitexactness to 26.444 */

#endif

lib_dec/FEC_HQ_phase_ecu_fx.c

+4 −4
Original line number Diff line number Diff line
@@ -1591,7 +1591,7 @@ static void ivas_spec_ana_fx( 
        IF( n > 0 && *pPlocs == 0 ) /* Very 1st peak position possible to have a peak at 0/DC index position. */

        {

#ifdef FIX_ISSUE_1237

            Copy_Scale_sig_16_32_no_sat( &xfp[*pPlocs], xfp_32, 3, Q15 ); // Q + 16

            Copy_Scale_sig_16_32_no_sat( &xfp[*pPlocs], xfp_32, 3, Q15 ); // Q + 15

#else

            Copy_Scale_sig_16_32_DEPREC( &xfp[*pPlocs], xfp_32, 3, Q16 );           // Q + 16

#endif
@@ -1606,7 +1606,7 @@ static void ivas_spec_ana_fx( 
        IF( n > 0 && EQ_16( *pPlocs, 1 ) ) /* Also 2nd peak position uses DC which makes jacobsen unsuitable. */

        {

#ifdef FIX_ISSUE_1237

            Copy_Scale_sig_16_32_no_sat( &xfp[*pPlocs - 1], xfp_32, 3, Q15 ); // Q + 16

            Copy_Scale_sig_16_32_no_sat( &xfp[*pPlocs - 1], xfp_32, 3, Q15 ); // Q + 15

#else

            Copy_Scale_sig_16_32_DEPREC( &xfp[*pPlocs - 1], xfp_32, 3, Q16 );       // Q + 16

#endif
@@ -1656,7 +1656,7 @@ static void ivas_spec_ana_fx( 
            IF( EQ_16( currPlocs, ( sub( Lprot2_1, DELTA_CORR_F0_INT ) ) ) ) /* Also 2nd last peak position uses fs/2  which makes jacobsen less suitable. */

            {

#ifdef FIX_ISSUE_1237

                Copy_Scale_sig_16_32_no_sat( &xfp[currPlocs - 1], xfp_32, 3, Q15 ); // Q + 16

                Copy_Scale_sig_16_32_no_sat( &xfp[currPlocs - 1], xfp_32, 3, Q15 ); // Q + 15

#else

                Copy_Scale_sig_16_32_DEPREC( &xfp[currPlocs - 1], xfp_32, 3, Q16 ); // Q + 16

#endif
@@ -1674,7 +1674,7 @@ static void ivas_spec_ana_fx( 
            IF( n > 0 ) /* fs/2 which makes special case . */

            {

#ifdef FIX_ISSUE_1237

                Copy_Scale_sig_16_32_no_sat( &xfp[currPlocs - 2], xfp_32, 3, Q15 ); // Q + 16

                Copy_Scale_sig_16_32_no_sat( &xfp[currPlocs - 2], xfp_32, 3, Q15 ); // Q + 15

#else

                Copy_Scale_sig_16_32_DEPREC( &xfp[currPlocs - 2], xfp_32, 3, Q16 ); // Q + 16

#endif