Commit 1cd54fc3 authored by multrus's avatar multrus
Browse files

[cleanup] accept NONBE_1214_PLC_LSF_MEMORY

parent 78db81fd

lib_com/options.h

+0 −1
Original line number Diff line number Diff line
@@ -90,7 +90,6 @@ 


#define FIX_1129_EXT_REND_OUTPUT_HIGH                   /* Philips: issue 1129: External renderer BINAURAL_ROOM_REVERB format output level too high compared to internal rendering output */

#define NONBE_1360_LFE_DELAY                            /* Dlb: LFE delay alignment when rendering in CLDFB domain*/

#define NONBE_1214_PLC_LSF_MEMORY                       /* VA: issue 1224: reset ACELP PLC FEC memory in case of switching from MDCT stereo to TD/DFT stereo */

#define NONBE_1293_SR_HRTF                              /* VA: issue 1293: add support of external HRTFs in split rendering */

#define FIX_1249_REMOVE_OBSOLETE_ALLRAD_MATRIX          /* VA: issue 1249: remove obsolete code around ALLRAD decoder matrix */

#define NONBE_1220_OMASA_JBM_BRATE_SW_FLUSH             /* VA: issue 1220: fix bug in renderer flush in OMASA 1ISM JBM bitrate switching */

lib_dec/core_switching_dec_fx.c

+0 −5
Original line number Diff line number Diff line
@@ -2446,16 +2446,11 @@ ivas_error core_switching_pre_dec_ivas_fx( 
    test();

    test();

    test();

#ifdef NONBE_1214_PLC_LSF_MEMORY

    test();

    test();

    IF( ( ( ( st->core == ACELP_CORE ) || EQ_16( st->core, AMR_WB_CORE ) ) && EQ_16( st->last_core, HQ_CORE ) ) ||

        ( ( EQ_16( st->element_mode, IVAS_CPE_DFT ) || EQ_16( st->element_mode, IVAS_CPE_TD ) || ( EQ_16( st->element_mode, IVAS_CPE_MDCT ) && EQ_16( last_element_mode, IVAS_CPE_DFT ) ) ) && EQ_16( nchan_out, 2 ) && NE_32( st->core_brate, SID_2k40 ) && ( st->core_brate != FRAME_NO_DATA ) && ( ( last_core_brate_st0 == FRAME_NO_DATA ) || EQ_32( last_core_brate_st0, SID_2k40 ) ) ) ||

        ( st->core == ACELP_CORE && GT_16( st->last_L_frame, L_FRAME16k ) ) /* TCX @ 25.6/32 kHz -> ACELP */ )

#else

    IF( ( ( ( st->core == ACELP_CORE ) || EQ_16( st->core, AMR_WB_CORE ) ) && EQ_16( st->last_core, HQ_CORE ) ) || ( ( EQ_16( st->element_mode, IVAS_CPE_DFT ) || EQ_16( st->element_mode, IVAS_CPE_TD ) || ( EQ_16( st->element_mode, IVAS_CPE_MDCT ) && EQ_16( last_element_mode, IVAS_CPE_DFT ) ) ) && EQ_16( nchan_out, 2 ) &&

                                                                                                                     NE_32( st->core_brate, SID_2k40 ) && ( st->core_brate != FRAME_NO_DATA ) && ( ( last_core_brate_st0 == FRAME_NO_DATA ) || EQ_32( last_core_brate_st0, SID_2k40 ) ) ) )

#endif

    {

        test();

        if ( EQ_16( st->element_mode, IVAS_CPE_DFT ) || EQ_16( st->element_mode, IVAS_CPE_TD ) )

lib_enc/core_switching_enc_fx.c

+0 −10
Original line number Diff line number Diff line
@@ -183,16 +183,11 @@ void core_switching_pre_enc_fx( 
    test();

    test();

    test();

#ifdef NONBE_1214_PLC_LSF_MEMORY

    test();

    test();

    IF( ( ( ( st_fx->core == ACELP_CORE ) || EQ_16( st_fx->core, AMR_WB_CORE ) ) && EQ_16( st_fx->last_core, HQ_CORE ) ) /* EVS and HQ -> ACELP */ ||

        ( ( EQ_16( st_fx->element_mode, IVAS_CPE_DFT ) || EQ_16( st_fx->element_mode, IVAS_CPE_TD ) || ( EQ_16( st_fx->element_mode, IVAS_CPE_MDCT ) && EQ_16( last_element_mode, IVAS_CPE_DFT ) ) ) && EQ_16( active_cnt, 1 ) ) ||

        ( st_fx->core == ACELP_CORE && GT_16( st_fx->last_L_frame, L_FRAME16k ) ) /* TCX @ 25.6/32 kHz -> ACELP */ )

#else

    IF( ( ( ( st_fx->core == ACELP_CORE ) || EQ_16( st_fx->core, AMR_WB_CORE ) ) && EQ_16( st_fx->last_core, HQ_CORE ) ) ||

        ( ( EQ_16( st_fx->element_mode, IVAS_CPE_DFT ) || EQ_16( st_fx->element_mode, IVAS_CPE_TD ) || ( EQ_16( st_fx->element_mode, IVAS_CPE_MDCT ) && EQ_16( last_element_mode, IVAS_CPE_DFT ) ) ) && EQ_16( active_cnt, 1 ) ) )

#endif

    {

        IF( EQ_16( st_fx->L_frame, L_FRAME16k ) )

        {
@@ -806,16 +801,11 @@ void core_switching_pre_enc_ivas_fx( 
    test();

    test();

    test();

#ifdef NONBE_1214_PLC_LSF_MEMORY

    test();

    test();

    IF( ( ( ( st_fx->core == ACELP_CORE ) || EQ_16( st_fx->core, AMR_WB_CORE ) ) && EQ_16( st_fx->last_core, HQ_CORE ) ) /* EVS and HQ -> ACELP */ ||

        ( ( EQ_16( st_fx->element_mode, IVAS_CPE_DFT ) || EQ_16( st_fx->element_mode, IVAS_CPE_TD ) || ( EQ_16( st_fx->element_mode, IVAS_CPE_MDCT ) && EQ_16( last_element_mode, IVAS_CPE_DFT ) ) ) && EQ_16( active_cnt, 1 ) ) ||

        ( st_fx->core == ACELP_CORE && GT_16( st_fx->last_L_frame, L_FRAME16k ) ) /* TCX @ 25.6/32 kHz -> ACELP */ )

#else

    IF( ( ( ( st_fx->core == ACELP_CORE ) || EQ_16( st_fx->core, AMR_WB_CORE ) ) && EQ_16( st_fx->last_core, HQ_CORE ) ) ||

        ( ( EQ_16( st_fx->element_mode, IVAS_CPE_DFT ) || EQ_16( st_fx->element_mode, IVAS_CPE_TD ) || ( EQ_16( st_fx->element_mode, IVAS_CPE_MDCT ) && EQ_16( last_element_mode, IVAS_CPE_DFT ) ) ) && EQ_16( active_cnt, 1 ) ) )

#endif

    {

        IF( EQ_16( st_fx->L_frame, L_FRAME16k ) )

        {