Loading lib_com/options.h +1 −0 Original line number Diff line number Diff line Loading @@ -209,6 +209,7 @@ #define NONBE_FIX_1337_MISSING_DIRECTIVITY_DISTATT_EXTREND /* Eri: issue 1337: Missing directivity setting and distance attenuation in external renderer IVAS_rend */ #define FIX_1348_OVERFLOW /* FhG: fix BASOP overflow in hq_lr_dec(), brings floating-point code inline with FX */ #define FIX_587_DEFAULT_REVERB /* Philips: issue 587: inconsistent default reverb parameters across renderers */ #define NONBE_1214_PLC_LSF_MEMORY /* VA: issue 1224: reset ACELP PLC FEC memory in case of switching from MDCT stereo to TD/DFT stereo */ /* #################### End BASOP porting switches ############################ */ Loading lib_dec/core_switching_dec.c +6 −0 Original line number Diff line number Diff line Loading @@ -263,8 +263,14 @@ ivas_error core_switching_pre_dec( st->uv_count = 0; } #ifdef NONBE_1214_PLC_LSF_MEMORY if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) || ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ ) #else if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) ) #endif { if ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD ) { Loading lib_enc/core_switching_enc.c +6 −0 Original line number Diff line number Diff line Loading @@ -171,7 +171,13 @@ void core_switching_pre_enc( st->uv_count = 0; } #ifdef NONBE_1214_PLC_LSF_MEMORY if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) || ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ ) #else if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) ) #endif { /* Reset the ACELP core in case of HQ->ACELP core switching */ Loading Loading
lib_com/options.h +1 −0 Original line number Diff line number Diff line Loading @@ -209,6 +209,7 @@ #define NONBE_FIX_1337_MISSING_DIRECTIVITY_DISTATT_EXTREND /* Eri: issue 1337: Missing directivity setting and distance attenuation in external renderer IVAS_rend */ #define FIX_1348_OVERFLOW /* FhG: fix BASOP overflow in hq_lr_dec(), brings floating-point code inline with FX */ #define FIX_587_DEFAULT_REVERB /* Philips: issue 587: inconsistent default reverb parameters across renderers */ #define NONBE_1214_PLC_LSF_MEMORY /* VA: issue 1224: reset ACELP PLC FEC memory in case of switching from MDCT stereo to TD/DFT stereo */ /* #################### End BASOP porting switches ############################ */ Loading
lib_dec/core_switching_dec.c +6 −0 Original line number Diff line number Diff line Loading @@ -263,8 +263,14 @@ ivas_error core_switching_pre_dec( st->uv_count = 0; } #ifdef NONBE_1214_PLC_LSF_MEMORY if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) || ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ ) #else if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) ) #endif { if ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD ) { Loading
lib_enc/core_switching_enc.c +6 −0 Original line number Diff line number Diff line Loading @@ -171,7 +171,13 @@ void core_switching_pre_enc( st->uv_count = 0; } #ifdef NONBE_1214_PLC_LSF_MEMORY if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) || ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ ) #else if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) ) #endif { /* Reset the ACELP core in case of HQ->ACELP core switching */ Loading