Commit 7a1f273b authored by Archit Tamarapu's avatar Archit Tamarapu
Browse files

[cleanup] accept FIX_1166_TDREND_DIV0

parent ea56adec

lib_com/options.h

+0 −1
Original line number Diff line number Diff line
@@ -101,7 +101,6 @@ 
#define FIX_1053_REVERB_RECONFIGURATION

#define TMP_FIX_1119_SPLIT_RENDERING_VOIP               /* FhG: Add error check for unsupported config: split rendering with VoIP mode */

#define FIX_1113_EXTREND_ISAR                           /* FhG: issue 1113: fix external renderer asserts for FOA/HOA2 and CLDFB config */

#define FIX_1166_TDREND_DIV0                            /* FhG,Eri: issue 1166: potential divide by zero in TD Renderer */

#define NONBE_1203_MDCT2DFT_SWITCHING                   /* VA: issue 1203: fix severe artifacts during MDCT to DFT stereo switching when MDCT ITD is not used */

#define NONBE_1122_KEEP_EVS_MODE_UNCHANGED              /* FhG: Disables fix for issue 1122 in EVS mode to keep BE tests green. This switch should be removed once the 1122 fix is added to EVS via a CR.  */

#define FIX_938_COMPILER_WARNING                        /* FhG: Fix compiler warning in ivas_mdct_core_reconstruct() */

lib_rend/ivas_objectRenderer_hrFilt_fx.c

+0 −4
Original line number Diff line number Diff line
@@ -328,17 +328,13 @@ static void GenerateFilter_fx( 
        ESynL_e = sub( ESynL_e, 32 );

        ESynL = W_shl_sat_l( temp1, ESynL_e );

        ESynL_e = sub( BMEnergiesL_e, ESynL_e );

#ifdef FIX_1166_TDREND_DIV0

        ESynL = BASOP_Util_Add_Mant32Exp( ESynL, ESynL_e, EPSILON_FX_M, EPSILON_FX_E, &ESynL_e );

#endif



        ESynR_e = W_norm( temp2 );

        ESynR_e = sub( ESynR_e, 32 );

        ESynR = W_shl_sat_l( temp2, ESynR_e );

        ESynR_e = sub( BMEnergiesR_e, ESynR_e );

#ifdef FIX_1166_TDREND_DIV0

        ESynR = BASOP_Util_Add_Mant32Exp( ESynR, ESynR_e, EPSILON_FX_M, EPSILON_FX_E, &ESynR_e );

#endif





        tmp32 = L_deposit_h( BASOP_Util_Divide3232_Scale( ETotL, ESynL, &ScaleL_e ) );