Commit 92b24a01 authored by multrus's avatar multrus
Browse files

[cleanup] accept NONBE_1240_FIX_CORE_SELECTION_ISM_SW

parent fc8ff114
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@@ -159,7 +159,6 @@
#define FIX_1129_EXT_REND_OUTPUT_HIGH                   /* Philips: issue 1129: External renderer BINAURAL_ROOM_REVERB format output level too high compared to internal rendering output */
#define NONBE_1244_FIX_SWB_BWE_MEMORY                   /* VA: issue 1244: fix to SWB BWE memory in case of switching from FB coding - pending a review by Huawei */
#define FIX_1113_CLDFB_REND_IN_ISAR                     /* issue 1113: fix the use of CLDFB renderer in split-rendering at the external renderer */
#define NONBE_1240_FIX_CORE_SELECTION_ISM_SW            /* VA: issue 1240: Remove the forcing of the TCX core in ISM when switching from a high bitarte to a low one */
#define FIX_1101_CLEANING_JBM_CALL                      /* VA: issue 1101: remove obsolete call of ivas_jbm_dec_tc_buffer_open() */
#define NONBE_FIX_1337_MISSING_DIRECTIVITY_DISTATT_EXTREND /* Eri: issue 1337: Missing directivity setting and distance attenuation in external renderer IVAS_rend */
#define FIX_1348_OVERFLOW                               /* FhG: fix BASOP overflow in hq_lr_dec(), brings floating-point code inline with FX */
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@@ -183,12 +183,8 @@ void ivas_decision_matrix_enc(
        st->core = ACELP_CORE;
    }

#ifdef NONBE_1240_FIX_CORE_SELECTION_ISM_SW
    /* sanity check: highest bitrates in ISM */
    if ( st->is_ism_format && st->tcxonly && st->total_brate > MAX_ACELP_BRATE_ISM )
#else
    if ( st->is_ism_format && st->tcxonly )
#endif
    {
        st->core = TCX_20_CORE;
    }