Commit 9b72c000 authored by vaillancour's avatar vaillancour
Browse files

part 3 of Reusing EVS FCB HR

parent 82487175

lib_com/bits_alloc_fx.c

+4 −0
Original line number Diff line number Diff line
@@ -861,11 +861,13 @@ ivas_error config_acelp1( 
        /* used in acelp_core_switch_enc() */

        nb_subfr = 1;

        move16();

#ifndef FORCE_GENERIC

        if ( EQ_16( L_frame, L_FRAME ) )

        {

            coder_type_sw = TRANSITION;

            move16();

        }

#endif

    }



    /*-----------------------------------------------------------------*
@@ -1965,11 +1967,13 @@ ivas_error config_acelp1_IVAS( 
        /* used in acelp_core_switch_enc() */

        nb_subfr = 1;

        move16();

#ifndef FORCE_GENERIC

        if ( EQ_16( L_frame, L_FRAME ) )

        {

            coder_type_sw = TRANSITION;

            move16();

        }

#endif

    }



    /*-----------------------------------------------------------------*

lib_com/options.h

+2 −0
Original line number Diff line number Diff line
@@ -102,6 +102,8 @@ 
#define USE_EVS_FCB_2           /* replace E_ACELP_4tsearch_ivas_fx with EVS, BE except for maybe one scaling condition that has to be verified on 26.444*/

#define USE_EVS_FCB_3 /*  replace E_ACELP_4tsearchx_ivas_fx with EVS, BE except for maybe one scaling condition that has to be verified on 26.444*/ */

#define USE_EVS_FCB_4 /*  replace corr_xh_ivas_fx with EVS, BE except for maybe one scaling condition that has to be verified on 26.444*/ */

#define USE_EVS_FCB_5 /*  replace corr_xh_ivas_fx with EVS, BE except for maybe one scaling condition that has to be verified on 26.444*/ */

#define USE_EVS_FCB_HR_1 /*  replace corr_xh_ivas_fx with EVS, BE except for maybe one scaling condition that has to be verified on 26.444*/ */



#endif

lib_enc/acelp_core_enc_fx.c

+1 −0
Original line number Diff line number Diff line
@@ -1331,6 +1331,7 @@ ivas_error acelp_core_enc_ivas_fx( 


            shift = sub( norm_s( max ), 3 );

            shift = s_min( shift, 0 );

            //shift = -2;

        }                                                           

#endif

        IF( nb_bits > 0 )

lib_enc/avq_cod_fx.c

+53 −3
Original line number Diff line number Diff line
@@ -182,7 +182,9 @@ void AVQ_encmux_fx( 
    Word16 bitsMod, Nsvm1, Nsvm2;

    Word16 unusedbitsFlag;

    Word16 svOrder[NSV_MAX], k, nullVec, dummy_bits;



#ifdef USE_EVS_FCB_HR_1

    Word16 tmp;

#endif

    test();

    IF( EQ_16( extl, SWB_BWE_HIGHRATE ) || EQ_16( extl, FB_BWE_HIGHRATE ) )

    {
@@ -344,7 +346,19 @@ void AVQ_encmux_fx( 
        test();

        test();

        test();

#ifdef USE_EVS_FCB_HR_1

        tmp = bits;

        move16();

        WHILE( GE_16( tmp, 5 ) )

        {

            tmp = sub( tmp, 5 );

        }

        assert( tmp == bits % 5 );

        IF( EQ_16( avq_bit_sFlag, 2 ) && EQ_16( tmp, 4 ) && GT_16( bits, 8 ) && LT_16( bits, 30 ) && GE_16( k, trgtSvPos ) && LT_16( i, Nsvm1 ) )



#else

        IF( EQ_16( avq_bit_sFlag, 2 ) && EQ_16( s_and( bits, 4 ), 4 ) && GT_16( bits, 8 ) && LT_16( bits, 30 ) && GE_16( k, trgtSvPos ) && LT_16( i, Nsvm1 ) )

#endif

        {

            ordr_esti( sub( Nsv, i ), &trgtSvPos, &svOrder[i], Nsv );

            k = svOrder[i];
@@ -406,10 +420,21 @@ void AVQ_encmux_fx( 
    } /* for */

    /* Bit Saving Solution */

    test();

    IF( avq_bit_sFlag > 0 && GT_16( bits, 8 ) )

    IF( avq_bit_sFlag > 0 && GT_16( bits, 8 ) ) /* Only in IVAS */

    {

#ifndef USE_EVS_FCB_HR_1

        // PMT("code not validated yet")

        bitsMod = s_and( bits, 4 /*bits%5*/ );

#else

        /* bitsMod = bits % 5;*/

        bitsMod = bits;

        move16();

        WHILE( bitsMod >= 5 )

        {

            bitsMod = sub( bitsMod, 5 );

        }

        assert( bitsMod == bits % 5 );

#endif

        i = svOrder[Nsvm1];

        move16();

        IF( NE_16( i, Nsvm1 ) )
@@ -445,11 +470,21 @@ void AVQ_encmux_fx( 
                bitsMod = 0;

                move16();

            }

            ELSE IF( nq_est > 4 && ( ( bitsMod == 0 && GT_16( nullVec, 3 ) && GT_16( nullVec, 6 ) ) || ( EQ_16( bitsMod, 4 ) && EQ_16( nullVec, 5 ) ) ) && nq[svOrder[Nsvm2]] == 0 ) /* wasted bits 4, 5 for nq 6,7..*/

            ELSE IF( GT_16( nq_est, 4 ) && ( ( bitsMod == 0 && GT_16( nullVec, 3 ) && GT_16( nullVec, 6 ) ) || ( EQ_16( bitsMod, 4 ) && EQ_16( nullVec, 5 ) ) ) && nq[svOrder[Nsvm2]] == 0 ) /* wasted bits 4, 5 for nq 6,7..*/

            {

                overflow = 0;

                move16();

#ifdef USE_EVS_FCB_HR_1

                tmp = add( bitsMod, nullVec );

                WHILE( tmp >= 5 )

                {

                    tmp = sub( tmp, 5 );

                }

                assert( tmp == add( bitsMod, nullVec ) % 5 );

                if ( tmp != 0 )

#else

                if ( s_and( add( bitsMod, nullVec ), 4 ) != 0 )

#endif

                {

                    overflow = 1;

                    move16();
@@ -476,7 +511,18 @@ void AVQ_encmux_fx( 
            unused_bits = sub( unused_bits, 1 ); /*Stop Bit*/

        }

        /*unused_bits_idx = (int16_t)unused_bits / 5;*/

#ifdef USE_EVS_FCB_HR_1

        IF( unused_bits >= 0 )

        {

            unused_bits_idx = mult( unused_bits, 6554 /*1/5 in Q15*/ );

        }

        ELSE

        {

            unused_bits_idx = negate( mult( negate( unused_bits ), 6554 /*1/5 in Q15*/ ) );

        }

#else

        unused_bits_idx = mult( unused_bits, 6554 );

#endif

        assert( unused_bits_idx == unused_bits / 5 );

        unusedbitsFlag = 0;

        move16();
@@ -506,7 +552,11 @@ void AVQ_encmux_fx( 
        IF( j > 0 )

        {

            /* write the unary code */

#ifdef USE_EVS_FCB_HR_1

            push_indice( hBstr, nq_ind, u_extract_l( L_sub( L_shl_sat( 1, j ), 1 ) ), j );

#else

            push_indice( hBstr, nq_ind, sub( shl( 1, j ), 1 ), j );

#endif

        }



        IF( nq[i] != 0 )

lib_enc/enc_gen_voic_fx.c

+10 −0
Original line number Diff line number Diff line
@@ -631,8 +631,13 @@ void encod_gen_voic_ivas_fx( 
        test();

        IF( GE_32( st_fx->core_brate, MIN_BRATE_AVQ_EXC ) && NE_16( st_fx->coder_type, INACTIVE ) )

        {

#ifndef USE_EVS_FCB_5

            transf_cdbk_enc_ivas_fx( st_fx, harm_flag_acelp, i_subfr_fx, cn_fx, exc_fx, p_Aq_fx, p_Aw_fx, h1_fx, xn_fx,

                                     xn2_fx, y1_fx, y2_fx, Es_pred_fx, &gain_pit_fx, gain_code_fx, g_corr_fx, clip_gain_fx, &gain_preQ_fx, code_preQ_fx, unbits_fx, Q_new, shift );

#else

            transf_cdbk_enc_fx( st_fx, harm_flag_acelp, i_subfr_fx, cn_fx, exc_fx, p_Aq_fx, p_Aw_fx, h1_fx, xn_fx,

                                     xn2_fx, y1_fx, y2_fx, Es_pred_fx, &gain_pit_fx, gain_code_fx, g_corr_fx, clip_gain_fx, &gain_preQ_fx, code_preQ_fx, unbits_fx, Q_new, shift );

#endif

        }



        /*-----------------------------------------------------------------*
@@ -711,8 +716,13 @@ void encod_gen_voic_ivas_fx( 
        test();

        IF( !st_fx->inactive_coder_type_flag && EQ_16( st_fx->coder_type, INACTIVE ) )

        {

#ifndef USE_EVS_FCB_5

            transf_cdbk_enc_ivas_fx( st_fx, 0, i_subfr_fx, cn_fx, exc_fx, p_Aq_fx, p_Aw_fx, h1_fx, xn_fx, xn2_fx, y1_fx, y2_fx,

                                     Es_pred_fx, &gain_pit_fx, gain_code_fx, g_corr_fx, clip_gain_fx, &gain_preQ_fx, code_preQ_fx, unbits_fx, Q_new, shift );

#else

            transf_cdbk_enc_fx( st_fx, 0, i_subfr_fx, cn_fx, exc_fx, p_Aq_fx, p_Aw_fx, h1_fx, xn_fx, xn2_fx, y1_fx, y2_fx,

                                     Es_pred_fx, &gain_pit_fx, gain_code_fx, g_corr_fx, clip_gain_fx, &gain_preQ_fx, code_preQ_fx, unbits_fx, Q_new, shift );

#endif

        }



        /*-----------------------------------------------------------------*