Commit a489e979 authored by Archit Tamarapu's avatar Archit Tamarapu
Browse files

[cleanup] accept NONBE_FIX_935_EARLY_REFLECTIONS_WRONG_ORDER

parent ecc63d45
Loading
Loading
Loading
Loading
+0 −1
Original line number Diff line number Diff line
@@ -195,7 +195,6 @@
#endif
#define FIX_963_USAN_ERROR                              /* Eri: Issue 963: USAN error in Stereo CNG, division by zero */
#define NONBE_FIX_952_MC_PARAMUPMIX_5MS                       /* Dlb : issue 952 : Differences between 5ms and 20ms rendering for ParamUpmix*/
#define NONBE_FIX_935_EARLY_REFLECTIONS_WRONG_ORDER           /* Qualcomm: issue 953: fix order or ER channels in LC mode*/
#define NONBE_FIX_967_ISM_MONO_DMX                            /* FhG: issue 967: accumulating energies in ISM mono DMX */
#define NONBE_FIX_968_ISM_BRIR_WITH_HEADROTATION_5MS_FIX      /* FhG : issue #968: differences between 5ms and 20ms rendering for discrete ISM with BRIR and head rotation*/
#define NONBE_FIX_935_SBA_REVERB                              /* FhG: issue 935: fix MSAN error for SBA related to BINAURAL_ROOM_REVERB */
+0 −8
Original line number Diff line number Diff line
@@ -59,17 +59,9 @@ static uint16_t LC_mixing_7_1[7] = { 0, 1, 2, 3, 4, 3, 4 };

static uint16_t LC_mixing_5_1_2[7] = { 0, 1, 2, 3, 4, 0, 1 };

#ifdef NONBE_FIX_935_EARLY_REFLECTIONS_WRONG_ORDER
static uint16_t LC_mixing_5_1_4[9] = { 0, 1, 2, 3, 4, 0, 1, 3, 4 };
#else
static uint16_t LC_mixing_5_1_4[9] = { 0, 1, 2, 3, 4, 0, 1, 2, 3 };
#endif

#ifdef NONBE_FIX_935_EARLY_REFLECTIONS_WRONG_ORDER
static uint16_t LC_mixing_7_1_4[11] = { 0, 1, 2, 3, 4, 3, 4, 0, 1, 3, 4 };
#else
static uint16_t LC_mixing_7_1_4[11] = { 0, 1, 2, 3, 4, 3, 4, 0, 1, 2, 3 };
#endif


/*-----------------------------------------------------------------------------------------*