Commit f88b35e3 authored by vaclav's avatar vaclav
Browse files

Merge branch '1922-basop-PortFlpM1905' into 'main' 

[non-be] [allow-regression] Port MR1905 from float to BASOP

Closes #1922

See merge request !2106
parents 2c69b786 5726d3e2

lib_com/options.h

+1 −0
Original line number Diff line number Diff line
@@ -128,6 +128,7 @@ 
#define NONBE_SVD_OPTIMIZATION 

#define NONBE_FIX_1176_OSBA_REVERB_JBM_ASAN_ERROR       /* Ericsson: Issue 1176, fix in TDREND_firfilt for subframes shorter than the filter length */

#define NONBE_1131_ACELP_OOB                            /* VA: issue 1131: fix division-by-zero in acelp gain decoding caused by wrong length of buffer update when switching from HQ core to ACELP core */

#define NONBE_1240_FIX_CORE_SELECTION_ISM_SW            /* VA: issue 1240: Remove the forcing of the TCX core in ISM when switching from a high bitarte to a low one */

#define FIX_1101_CLEANING_JBM_CALL                      /* VA: issue 1101: remove obsolete call of ivas_jbm_dec_tc_buffer_open() */

lib_enc/ivas_decision_matrix_enc_fx.c

+12 −8
Original line number Diff line number Diff line
@@ -197,14 +197,6 @@ void ivas_decision_matrix_enc_fx( 
            move16();

        }

    }



    test();

    test();

    test();

    test();

    test();

    test();



#ifdef DEBUG_FORCE_DIR

    if ( st->force_dir[0] != '\0' )

    {
@@ -217,14 +209,26 @@ void ivas_decision_matrix_enc_fx( 
#endif



    /* do not allow TD stereo ACELP core -> DFT stereo TCX core switching as it is on the WC complexity path */

    test();

    test();

    test();

    test();

    test();

    test();

    if ( ( ( st->last_core == ACELP_CORE && EQ_16( last_element_mode, IVAS_CPE_TD ) && EQ_16( st->element_mode, IVAS_CPE_DFT ) ) || ( EQ_16( st->tdm_LRTD_flag, 1 ) && LE_32( st->total_brate, IVAS_16k4 ) ) ) && EQ_16( st->core, TCX_20_CORE ) && LE_32( st->total_brate, MAX_ACELP_BRATE ) ) /* Override TCX in case of LRTD && primary channel has low bitrate*/

    {

        st->core = ACELP_CORE;

        move16();

    }



    /* sanity check: highest bitrates in ISM */

    test();

#ifdef NONBE_1240_FIX_CORE_SELECTION_ISM_SW

    test();

    if ( st->is_ism_format && st->tcxonly && GT_32( st->total_brate, MAX_ACELP_BRATE_ISM ) )

#else

    if ( st->is_ism_format && st->tcxonly )

#endif

    {

        st->core = TCX_20_CORE;

        move16();