From 1eab03766bea97666cf2248fa2734ebaaecd425b Mon Sep 17 00:00:00 2001 From: Markus Multrus Date: Sat, 4 Oct 2025 17:01:51 +0200 Subject: [PATCH] port float MR1753 to main --- lib_com/options.h | 1 + lib_rend/ivas_objectRenderer_hrFilt_fx.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/lib_com/options.h b/lib_com/options.h index fdf73590a..fbacdf96f 100644 --- a/lib_com/options.h +++ b/lib_com/options.h @@ -137,6 +137,7 @@ #define FIX_1053_REVERB_RECONFIGURATION #define TMP_FIX_1119_SPLIT_RENDERING_VOIP /* FhG: Add error check for unsupported config: split rendering with VoIP mode */ #define FIX_1113_EXTREND_ISAR /* FhG: issue 1113: fix external renderer asserts for FOA/HOA2 and CLDFB config */ +#define FIX_1166_TDREND_DIV0 /* FhG,Eri: issue 1166: potential divide by zero in TD Renderer */ /* #################### End BASOP porting switches ############################ */ diff --git a/lib_rend/ivas_objectRenderer_hrFilt_fx.c b/lib_rend/ivas_objectRenderer_hrFilt_fx.c index b975d83b9..f5dbaea73 100644 --- a/lib_rend/ivas_objectRenderer_hrFilt_fx.c +++ b/lib_rend/ivas_objectRenderer_hrFilt_fx.c @@ -330,11 +330,17 @@ static void GenerateFilter_fx( ESynL_e = sub( ESynL_e, 32 ); ESynL = W_shl_sat_l( temp1, ESynL_e ); ESynL_e = sub( BMEnergiesL_e, ESynL_e ); +#ifdef FIX_1166_TDREND_DIV0 + ESynL = BASOP_Util_Add_Mant32Exp( ESynL, ESynL_e, EPSILON_FX_M, EPSILON_FX_E, &ESynL_e ); +#endif ESynR_e = W_norm( temp2 ); ESynR_e = sub( ESynR_e, 32 ); ESynR = W_shl_sat_l( temp2, ESynR_e ); ESynR_e = sub( BMEnergiesR_e, ESynR_e ); +#ifdef FIX_1166_TDREND_DIV0 + ESynR = BASOP_Util_Add_Mant32Exp( ESynR, ESynR_e, EPSILON_FX_M, EPSILON_FX_E, &ESynR_e ); +#endif tmp32 = L_deposit_h( BASOP_Util_Divide3232_Scale( ETotL, ESynL, &ScaleL_e ) ); -- GitLab