diff --git a/lib_com/options.h b/lib_com/options.h
index 44bb8d129296dd5826f372781908dccb0314a4a4..3dd4273c47542a1b0ea5a8e89bce7309862fc651 100644
--- a/lib_com/options.h
+++ b/lib_com/options.h
@@ -99,6 +99,7 @@
 #define HARMONIZE_2597_ShapeSpectrum                    /* FhG: Harmonize ShapeSpectrum with its ivas derivate */
 #define HARMONIZE_2567_init_functions                   /* FhG: harmonize derivates for evs/ivas regarding functions init_acelp*(),init_tcx_cfg*(), init_tcx*(), init_coder_ace_plus*(), init_core_sig_ana*() and init_modes*() */
 #define HARMONIZE_2607_GetFilterParameters              /* FhG: Harmonize GetFilterParameters with its ivas derivate */
+#define HAMRONIZE_2606_ENC_PRM                          /* FhG: Harmonize enc_prm_fx(), to match floating-point code */
 
 /* #################### End BE switches ################################## */
 
diff --git a/lib_enc/core_enc_2div_fx.c b/lib_enc/core_enc_2div_fx.c
index 1ce69cce12e158df3279b4eab11601e5a6a35343..6c77619f35817893f9f5798a20fff057675ecf68 100644
--- a/lib_enc/core_enc_2div_fx.c
+++ b/lib_enc/core_enc_2div_fx.c
@@ -360,5 +360,9 @@ void core_encode_twodiv_fx(
      * Generate Bitstream
      *---------------------------------------------------------------*/
 
+#ifdef HAMRONIZE_2606_ENC_PRM
+    enc_prm_fx( st, param_core, param_lpc, hm_cfg, bits_param_lpc, no_param_lpc );
+#else
     enc_prm_fx( coder_type, param_core, param_lpc, st, st->L_frame, hm_cfg, bits_param_lpc, no_param_lpc );
+#endif
 }
diff --git a/lib_enc/core_enc_ol_fx.c b/lib_enc/core_enc_ol_fx.c
index 94a306091a3df4c17b49c0dbb6dae776a32d777d..d7bba0701a27937d5b6978830091a0f046e835fa 100644
--- a/lib_enc/core_enc_ol_fx.c
+++ b/lib_enc/core_enc_ol_fx.c
@@ -523,7 +523,11 @@ void core_encode_openloop_fx(
      * Generate Bitstream
      *---------------------------------------------------------------*/
 
+#ifdef HAMRONIZE_2606_ENC_PRM
+    enc_prm_fx( st, param_core, param_lpc, &hm_cfg, bits_param_lpc, no_param_lpc );
+#else
     enc_prm_fx( coder_type, param_core, param_lpc, st, st->L_frame, &hm_cfg, bits_param_lpc, no_param_lpc );
+#endif
 
     /* Channel-aware mode - encode partial copy */
     IF( EQ_16( st->rf_mode, 1 ) )
diff --git a/lib_enc/enc_prm_fx.c b/lib_enc/enc_prm_fx.c
index 4db8f2f2c488e03c1b1844406f6d949ab348ecba..4a9f5ee23d0e70f6ad67a13e712bd40141ef8a42 100644
--- a/lib_enc/enc_prm_fx.c
+++ b/lib_enc/enc_prm_fx.c
@@ -239,6 +239,226 @@ void enc_prm_rf_fx(
  * the FAC parameters when transition occurs.                      *
  *-----------------------------------------------------------------*/
 
+#ifdef HAMRONIZE_2606_ENC_PRM
+void enc_prm_fx(
+    Encoder_State *st,        /* i/o : quantization Analysis values     */
+    Word16 param[],           /* (i) : parameters                       Q0*/
+    const Word16 param_lpc[], /* (i) : LPC parameters                   Q0*/
+    CONTEXT_HM_CONFIG hm_cfg[],
+    Word16 *bits_param_lpc,   /* Q0 */
+    const Word16 no_param_lpc /* Q0 */
+)
+{
+    Word16 j, n, sfr, core, last_core, nb_subfr;
+    Word16 *prm, tmp;
+    Word16 nbits_start, nbits_header, nbits_lpc;
+#ifdef DEBUGGING
+    Word16 total_nbbits;
+#endif
+    Word16 ix, j_old, wordcnt, bitcnt;
+    BSTR_ENC_HANDLE hBstr = st->hBstr;
+
+    /*--------------------------------------------------------------------------------*
+     * INIT
+     *--------------------------------------------------------------------------------*/
+
+    move16();
+    nbits_lpc = 0;
+
+    /* Useful parameters */
+    move16();
+    move16();
+    move16();
+    nb_subfr = st->nb_subfr;
+    core = st->core;
+    last_core = st->last_core;
+
+    /* Initialize pointers */
+    move16();
+    prm = param;
+
+    /* Init counters */
+    move16();
+    move16();
+    j = 0;
+    nbits_start = hBstr->nb_bits_tot; /* Q0 */
+
+
+    /*--------------------------------------------------------------------------------*
+     * HEADER
+     *--------------------------------------------------------------------------------*/
+
+    IF( EQ_16( st->mdct_sw, MODE1 ) )
+    {
+        /* Adjust st->bits_frame_core not to subtract MODE2 bandwidth signaling */
+        st->bits_frame_core = add( st->bits_frame_core, FrameSizeConfig[st->frame_size_index].bandwidth_bits ); /* Q0 */
+
+        /* Write MODE1 core mode signaling */
+        signalling_mode1_tcx20_enc_fx( st, 1 );
+    }
+
+    /* EVS header */
+    /* Modes (ACE_GC, ACE_UC, TCX20, TCX10...) */
+    writeTCXMode_fx( st, st->hBstr, 0 /* MCT_flag */, &nbits_start );
+
+    /* write last_core for error concealment */
+    test();
+    IF( !( EQ_16( core, ACELP_CORE ) && st->hTcxCfg->lfacNext <= 0 ) )
+    {
+        tmp = 0;
+        move16();
+        test();
+        IF( NE_16( last_core, ACELP_CORE ) || EQ_16( core, TCX_10_CORE ) )
+
+        {
+            tmp = TCX_20_CORE;
+            move16();
+        }
+        push_next_indice( hBstr, tmp, 1 );
+    }
+
+    /* write TCX overlap mode (1 bit: full, 2 bits: half or no overlap) */
+    IF( NE_16( core, ACELP_CORE ) )
+    {
+        writeTCXWindowing_fx( hBstr, st->hTcxCfg->tcx_curr_overlap_mode );
+    }
+
+    test();
+    IF( st->hPlcExt && st->hPlcExt->enableGplc )
+    {
+        /* encode side information. */
+        enc_prm_side_Info_fx( st->hPlcExt, st );
+    }
+
+    IF( st->glr )
+    {
+        test();
+        test();
+        test();
+        test();
+        IF( NE_16( core, ACELP_CORE ) || EQ_16( st->coder_type, INACTIVE ) ||
+            ( EQ_16( st->last_core, ACELP_CORE ) && EQ_16( st->last_coder_type_raw, INACTIVE ) ) ||
+            st->glr_reset )
+        {
+            st->glr_idx[0] = 0;
+            move16();
+        }
+
+        IF( EQ_16( core, ACELP_CORE ) )
+        {
+            push_next_indice( hBstr, st->glr_idx[0], G_LPC_RECOVERY_BITS );
+        }
+    }
+
+    st->glr_reset = 0;
+    move16();
+
+    nbits_header = sub( hBstr->nb_bits_tot, nbits_start ); /* Q0 */
+
+
+    /*--------------------------------------------------------------------------------*
+     * LPC PARAMETERS
+     *--------------------------------------------------------------------------------*/
+
+    writeLPCparam_fx( st, hBstr, param_lpc, bits_param_lpc, no_param_lpc, &nbits_lpc );
+
+    /*--------------------------------------------------------------------------------*
+     * ACELP
+     *--------------------------------------------------------------------------------*/
+
+    IF( EQ_16( core, ACELP_CORE ) )
+    {
+        /* Adaptive BPF (2 bits)*/
+        n = ACELP_BPF_BITS[st->acelp_cfg.bpf_mode];
+
+        IF( n != 0 )
+        {
+            push_next_indice( hBstr, st->bpf_gain_param, n );
+        }
+
+        /* Mean energy (2 or 3 bits) */
+        n = ACELP_NRG_BITS[st->acelp_cfg.nrg_mode]; /* Q0 */
+
+        IF( n != 0 )
+        {
+            push_next_indice( hBstr, prm[j++], n );
+        }
+
+        /* Subframe parameters */
+        FOR( sfr = 0; sfr < nb_subfr; sfr++ )
+        {
+            /* Pitch lag (4, 5, 6, 8 or 9 bits) */
+            move16();
+            n = ACELP_LTP_BITS_SFR[st->acelp_cfg.ltp_mode][sfr]; /* Q0 */
+
+            IF( n != 0 )
+            {
+                push_next_indice( hBstr, prm[j++], n );
+            }
+
+            /* Adaptive codebook filtering (1 bit) */
+            IF( EQ_16( st->acelp_cfg.ltf_mode, 2 ) )
+            {
+                push_next_indice( hBstr, prm[j++], 1 );
+            }
+
+            /*Innovative codebook*/
+            move16();
+            j_old = j;
+
+            if ( ( st->acelp_cfg.fixed_cdk_index[sfr] >= ACELP_FIXED_CDK_NB ) || ( st->acelp_cfg.fixed_cdk_index[sfr] < 0 ) )
+            {
+                fprintf( stderr, "ACELP bits allocation: wrong fixed cdk bit allocation\n" );
+                assert( 0 );
+            }
+
+
+            wordcnt = shr( ACELP_FIXED_CDK_BITS( st->acelp_cfg.fixed_cdk_index[sfr] ), 4 );
+            bitcnt = s_and( ACELP_FIXED_CDK_BITS( st->acelp_cfg.fixed_cdk_index[sfr] ), 15 );
+
+            FOR( ix = 0; ix < wordcnt; ix++ )
+            {
+                push_next_indice( hBstr, prm[j++], 16 );
+            }
+
+            IF( bitcnt )
+            {
+                push_next_indice( hBstr, prm[j++], bitcnt );
+            }
+
+            j = add( j_old, 8 ); /* Q0 */
+
+            /* Gains (5b, 6b or 7b / subfr) */
+            n = ACELP_GAINS_BITS[st->acelp_cfg.gains_mode[sfr]];
+            push_next_indice( hBstr, prm[j++], n );
+        } /*end of for(sfr)*/
+    } /*end of mode[0]==0*/
+
+
+    /*--------------------------------------------------------------------------------*
+     * TCX20/10 parameters
+     *--------------------------------------------------------------------------------*/
+
+    test();
+    IF( EQ_16( core, TCX_20_CORE ) || EQ_16( core, TCX_10_CORE ) )
+    {
+        writeTCXparam_fx( st, hBstr, hm_cfg, param, nbits_header, nbits_start, nbits_lpc, NULL, NULL, NULL, -1 );
+    }
+
+#ifdef DEBUGGING
+    total_nbbits = sub( hBstr->nb_bits_tot, nbits_start ); /* Q0 */
+
+    /* Check if total encoded bits does not exceed CBR target bits (->this must never happen) */
+    if ( st->bits_frame_core && ( total_nbbits > st->bits_frame_core ) )
+    {
+        fprintf( stderr, "AllocatedBits: %d Used bits: %d \n", st->bits_frame_core, total_nbbits );
+        assert( !"Core totalbits > CBR target bitrate" );
+    }
+#endif
+
+    return;
+}
+#else
 void enc_prm_fx(
     const Word16 coder_type,  /* (i) : coding type                      */
     Word16 param[],           /* (i) : parameters                       Q0*/
@@ -916,7 +1136,7 @@ void enc_prm_fx(
 
     return;
 }
-
+#endif
 
 /*-------------------------------------------------------------------*
  * writeLPCparam_fx()
diff --git a/lib_enc/prot_fx_enc.h b/lib_enc/prot_fx_enc.h
index e15ebd1c114f1daf565906c69ac649d6efd59810..43661151f93784bd5269a6b21e2a9596ca9959cb 100644
--- a/lib_enc/prot_fx_enc.h
+++ b/lib_enc/prot_fx_enc.h
@@ -2079,6 +2079,16 @@ void coder_tcx_post_ivas_fx(
     Word16 *wsig,
     Word16 Q_new );
 
+#ifdef HAMRONIZE_2606_ENC_PRM
+void enc_prm_fx(
+    Encoder_State *st,        /* i/o : quantization Analysis values     */
+    Word16 param[],           /* (i) : parameters                       Q0*/
+    const Word16 param_lpc[], /* (i) : LPC parameters                   Q0*/
+    CONTEXT_HM_CONFIG hm_cfg[],
+    Word16 *bits_param_lpc,   /* Q0 */
+    const Word16 no_param_lpc /* Q0 */
+);
+#else
 void enc_prm_fx(
     const Word16 coder_type,  /* i  : coding type                        */
     Word16 param[],           /* i  : parameters                         */
@@ -2088,6 +2098,7 @@ void enc_prm_fx(
     CONTEXT_HM_CONFIG hm_cfg[],
     Word16 *bits_param_lpc,
     const Word16 no_param_lpc );
+#endif
 
 void IGFEncSetMode_fx(
     const IGF_ENC_INSTANCE_HANDLE hIGFEnc, /* i/o: instance handle of IGF Encoder */