diff --git a/lib_dec/ivas_mdct_core_dec.c b/lib_dec/ivas_mdct_core_dec.c
index 57d08a708f01b2de0188a98652b94e4cb09174ab..e86d211f943594450f7267e0851a1336552558af 100644
--- a/lib_dec/ivas_mdct_core_dec.c
+++ b/lib_dec/ivas_mdct_core_dec.c
@@ -2161,6 +2161,11 @@ void ivas_mdct_core_reconstruct_fx(
         ELSE /*ACELP core for ACELP-PLC */
         {
             assert( EQ_16( st->bfi, 1 ) );
+
+            Scale_sig( synth_buf_fx, add( add( st->hTcxDec->old_synth_len, L_FRAME_PLUS ), M ), negate( q_syn ) );     // Q0
+            Scale_sig( synth_bufFB_fx, add( add( st->hTcxDec->old_synth_lenFB, L_FRAME_PLUS ), M ), negate( q_syn ) ); // Q0
+            q_syn = 0;
+            move16();
             /* PLC: [TCX: TD PLC] */
             IF( MCT_flag != 0 )
             {
@@ -2177,6 +2182,8 @@ void ivas_mdct_core_reconstruct_fx(
                     con_tcx_ivas_fx( st, &synthFB_fx[0], hCPE->hStereoMdct->lastCoh_fx, &sts[0]->seed_acelp, 0, &st->hFdCngDec->hFdCngCom->A_cng[0] );
                 }
             }
+
+            Scale_sig( synthFB_fx, st->hTcxDec->L_frameTCX, q_syn ); // q_syn
             IF( ( EQ_16( st->nbLostCmpt, 1 ) ) || ( st->hTcxDec->tcxConceal_recalc_exc != 0 ) )
             {
                 Scale_sig( synthFB_fx - add( add( shr( st->hTcxDec->L_frameTCX, 1 ), st->hTcxDec->pit_max_TCX ), 2 * M ), add( add( shr( st->hTcxDec->L_frameTCX, 1 ), st->hTcxDec->pit_max_TCX ), 2 * M ), sub( q_syn, sub( st->Q_exc, 1 ) ) ); // 2 * q_syn - (st->Q_exc - 1)