Loading lib_com/ivas_pca_tools.c +8 −0 Original line number Diff line number Diff line Loading @@ -152,7 +152,11 @@ static void house_refl( pu[0] -= 1; } #ifdef FIX_I120_INV_SQRT _rcp = inv_sqrt( fabsf( pu[0] ) ); #else _rcp = 1.f / sqrtf( fabsf( pu[0] ) ); #endif for ( i = 0; i < sizex; i++ ) { Loading Loading @@ -645,7 +649,11 @@ static void norm_quat( norm_q = dotp( q, q, IVAS_PCA_INTERP ); #ifdef FIX_I120_INV_SQRT norm_q = inv_sqrt( norm_q ); // VE: TBV: possible division by 0 #else norm_q = 1 / sqrtf( norm_q ); // VE: TBV: possible division by 0 #endif for ( i = 0; i < IVAS_PCA_INTERP; i++ ) { Loading lib_com/options.h +1 −0 Original line number Diff line number Diff line Loading @@ -152,6 +152,7 @@ #define FIX_DIRAC_CHANNELS /* Issue 71: lower number of DirAC analysis channels */ #define HARMONIZE_SBA_NCHAN_TRANSPORT /* harmonize setting of number of transport channels in SBA */ #define FIX_I13_TCX_TNS_ISSUE /* Issue 13: Fix reported artifacts. Bug in TNS with TCX5 */ #define FIX_I120_INV_SQRT /* Issue 120: inv_sqrt() shall be used instead of 1 / sqrt() to measure the correct complexity */ #define ISM_BITRATE_SWITCHING /* Issue 115: Support for Bitrate Switching in ISM */ Loading lib_com/prot.h +2 −1 Original line number Diff line number Diff line Loading @@ -7137,7 +7137,8 @@ void lsf_weight_2st( const float *lsfq, float *w, const int16_t mode, const int32_t sr_core ); const int32_t sr_core ); void mdct_window_sine( float *window, Loading lib_com/vlpc_2st_com.c +2 −1 Original line number Diff line number Diff line Loading @@ -52,7 +52,8 @@ void lsf_weight_2st( const float *lsfq, float *w, const int16_t mode, const int32_t sr_core ) const int32_t sr_core ) { int16_t i; float d[M + 1]; Loading lib_dec/dlpc_avq.c +0 −1 Original line number Diff line number Diff line Loading @@ -57,7 +57,6 @@ int16_t dlpc_avq( int16_t *p_index, q_type; /* Last LPC index */ if ( numlpc == 1 ) { last = 0; Loading Loading
lib_com/ivas_pca_tools.c +8 −0 Original line number Diff line number Diff line Loading @@ -152,7 +152,11 @@ static void house_refl( pu[0] -= 1; } #ifdef FIX_I120_INV_SQRT _rcp = inv_sqrt( fabsf( pu[0] ) ); #else _rcp = 1.f / sqrtf( fabsf( pu[0] ) ); #endif for ( i = 0; i < sizex; i++ ) { Loading Loading @@ -645,7 +649,11 @@ static void norm_quat( norm_q = dotp( q, q, IVAS_PCA_INTERP ); #ifdef FIX_I120_INV_SQRT norm_q = inv_sqrt( norm_q ); // VE: TBV: possible division by 0 #else norm_q = 1 / sqrtf( norm_q ); // VE: TBV: possible division by 0 #endif for ( i = 0; i < IVAS_PCA_INTERP; i++ ) { Loading
lib_com/options.h +1 −0 Original line number Diff line number Diff line Loading @@ -152,6 +152,7 @@ #define FIX_DIRAC_CHANNELS /* Issue 71: lower number of DirAC analysis channels */ #define HARMONIZE_SBA_NCHAN_TRANSPORT /* harmonize setting of number of transport channels in SBA */ #define FIX_I13_TCX_TNS_ISSUE /* Issue 13: Fix reported artifacts. Bug in TNS with TCX5 */ #define FIX_I120_INV_SQRT /* Issue 120: inv_sqrt() shall be used instead of 1 / sqrt() to measure the correct complexity */ #define ISM_BITRATE_SWITCHING /* Issue 115: Support for Bitrate Switching in ISM */ Loading
lib_com/prot.h +2 −1 Original line number Diff line number Diff line Loading @@ -7137,7 +7137,8 @@ void lsf_weight_2st( const float *lsfq, float *w, const int16_t mode, const int32_t sr_core ); const int32_t sr_core ); void mdct_window_sine( float *window, Loading
lib_com/vlpc_2st_com.c +2 −1 Original line number Diff line number Diff line Loading @@ -52,7 +52,8 @@ void lsf_weight_2st( const float *lsfq, float *w, const int16_t mode, const int32_t sr_core ) const int32_t sr_core ) { int16_t i; float d[M + 1]; Loading
lib_dec/dlpc_avq.c +0 −1 Original line number Diff line number Diff line Loading @@ -57,7 +57,6 @@ int16_t dlpc_avq( int16_t *p_index, q_type; /* Last LPC index */ if ( numlpc == 1 ) { last = 0; Loading