Loading ci/run-first-frame-is-sid-test.sh +2 −2 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ cp IVAS_cod_nosan CLANG1/IVAS_cod exit_code_msan=0 echo "-------------- 1. Encoder + Msan decoder -------------- " echo "-------------- 1.1 all DTX modes except SBA -------------- " scripts/IvasBuildAndRunChecks.py --checks CLANG1 -m $modes_no_sba -U 0:20 $common_args || exit_code_msan=$? scripts/IvasBuildAndRunChecks.py --checks CLANG1 -m $modes_no_sba -U 80:100 $common_args || exit_code_msan=$? echo "-------------- 1.2 HOA2 + HOA3 DTX modes -------------- " scripts/IvasBuildAndRunChecks.py --checks CLANG1 -m $modes_hoa -U 70:80 $common_args || exit_code_msan=$? echo "-------------- 1.3 FOA DTX modes -------------- " Loading @@ -45,7 +45,7 @@ cp -r CLANG1/enc CLANG3/enc exit_code_asan_usan=0 echo "-------------- 2. Asan + Usan decoder -------------- " echo "-------------- 2.1 all DTX modes except SBA -------------- " scripts/IvasBuildAndRunChecks.py --checks CLANG2 CLANG3 --decoder_only -m $modes_no_sba -U 0:20 $common_args || exit_code_asan_usan=$? scripts/IvasBuildAndRunChecks.py --checks CLANG2 CLANG3 --decoder_only -m $modes_no_sba -U 80:100 $common_args || exit_code_asan_usan=$? echo "-------------- 2.2 HOA2 + HOA3 DTX modes -------------- " scripts/IvasBuildAndRunChecks.py --checks CLANG2 CLANG3 --decoder_only -m $modes_hoa -U 70:80 $common_args || exit_code_asan_usan=$? echo "-------------- 2.3 FOA DTX modes -------------- " Loading lib_com/bitstream.c +2 −2 Original line number Diff line number Diff line Loading @@ -1714,7 +1714,7 @@ ivas_error write_indices_ivas( { int16_t i, n; uint16_t *pt_stream; #ifdef ENABLE_BITRATE_VERIFICATION #ifndef ENABLE_BITRATE_VERIFICATION Encoder_State **sts; int32_t ivas_total_brate; int16_t ch; Loading @@ -1729,7 +1729,7 @@ ivas_error write_indices_ivas( bit_stream[i] = 0; } #ifdef ENABLE_BITRATE_VERIFICATION #ifndef ENABLE_BITRATE_VERIFICATION i = 0; for ( n = 0; n < st_ivas->nSCE; n++ ) Loading lib_com/options.h +2 −0 Original line number Diff line number Diff line Loading @@ -171,8 +171,10 @@ #define NONBE_FIX_GSC_BSTR /* VA: issue 1264: Fix bitstream synchronization between encoder and decoder in ACELP GSC in OMASA */ #define NONBE_1273_ISM_METADATA_COUNTER /* VA: issue 1273: fix counter overflow in ISM metadata encoder */ #define NONBE_1279_COUNTER_OVERFLOW /* VA: issue 1279: Avoid possible overflow of counter st->Nb_ACELP_frames */ #define NONBE_1244_FIX_SWB_BWE_MEMORY /* VA: issue 1244: fix to SWB BWE memory in case of switching from FB coding - pending a review by Huawei */ #define NONBE_FIX_1277_EVS_DTX_HIGH_RATE_THRESHOLD /* VA/Eri: issue 1277: Fix Mismatch in DTX high-rate threshold between EVS float and BASOP */ /* ##################### End NON-BE switches ########################### */ /* ################## End DEVELOPMENT switches ######################### */ Loading lib_enc/swb_pre_proc.c +4 −0 Original line number Diff line number Diff line Loading @@ -442,7 +442,11 @@ void swb_pre_proc( if ( st->last_extl != SWB_BWE && st->last_extl != FB_BWE ) { /* resample 48 kHz to 32kHz */ #ifdef NONBE_1244_FIX_SWB_BWE_MEMORY if ( ( st->last_bwidth == FB && st->element_mode == EVS_MONO ) || ( st->bwidth == FB && st->element_mode > EVS_MONO ) ) // note: once EVS i CR fixed, the condition will simplify to "if ( st->bwidth == FB )" only #else if ( st->last_bwidth == FB ) #endif { inner_frame = L_FRAME48k; inner_Fs = 48000; Loading Loading
ci/run-first-frame-is-sid-test.sh +2 −2 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ cp IVAS_cod_nosan CLANG1/IVAS_cod exit_code_msan=0 echo "-------------- 1. Encoder + Msan decoder -------------- " echo "-------------- 1.1 all DTX modes except SBA -------------- " scripts/IvasBuildAndRunChecks.py --checks CLANG1 -m $modes_no_sba -U 0:20 $common_args || exit_code_msan=$? scripts/IvasBuildAndRunChecks.py --checks CLANG1 -m $modes_no_sba -U 80:100 $common_args || exit_code_msan=$? echo "-------------- 1.2 HOA2 + HOA3 DTX modes -------------- " scripts/IvasBuildAndRunChecks.py --checks CLANG1 -m $modes_hoa -U 70:80 $common_args || exit_code_msan=$? echo "-------------- 1.3 FOA DTX modes -------------- " Loading @@ -45,7 +45,7 @@ cp -r CLANG1/enc CLANG3/enc exit_code_asan_usan=0 echo "-------------- 2. Asan + Usan decoder -------------- " echo "-------------- 2.1 all DTX modes except SBA -------------- " scripts/IvasBuildAndRunChecks.py --checks CLANG2 CLANG3 --decoder_only -m $modes_no_sba -U 0:20 $common_args || exit_code_asan_usan=$? scripts/IvasBuildAndRunChecks.py --checks CLANG2 CLANG3 --decoder_only -m $modes_no_sba -U 80:100 $common_args || exit_code_asan_usan=$? echo "-------------- 2.2 HOA2 + HOA3 DTX modes -------------- " scripts/IvasBuildAndRunChecks.py --checks CLANG2 CLANG3 --decoder_only -m $modes_hoa -U 70:80 $common_args || exit_code_asan_usan=$? echo "-------------- 2.3 FOA DTX modes -------------- " Loading
lib_com/bitstream.c +2 −2 Original line number Diff line number Diff line Loading @@ -1714,7 +1714,7 @@ ivas_error write_indices_ivas( { int16_t i, n; uint16_t *pt_stream; #ifdef ENABLE_BITRATE_VERIFICATION #ifndef ENABLE_BITRATE_VERIFICATION Encoder_State **sts; int32_t ivas_total_brate; int16_t ch; Loading @@ -1729,7 +1729,7 @@ ivas_error write_indices_ivas( bit_stream[i] = 0; } #ifdef ENABLE_BITRATE_VERIFICATION #ifndef ENABLE_BITRATE_VERIFICATION i = 0; for ( n = 0; n < st_ivas->nSCE; n++ ) Loading
lib_com/options.h +2 −0 Original line number Diff line number Diff line Loading @@ -171,8 +171,10 @@ #define NONBE_FIX_GSC_BSTR /* VA: issue 1264: Fix bitstream synchronization between encoder and decoder in ACELP GSC in OMASA */ #define NONBE_1273_ISM_METADATA_COUNTER /* VA: issue 1273: fix counter overflow in ISM metadata encoder */ #define NONBE_1279_COUNTER_OVERFLOW /* VA: issue 1279: Avoid possible overflow of counter st->Nb_ACELP_frames */ #define NONBE_1244_FIX_SWB_BWE_MEMORY /* VA: issue 1244: fix to SWB BWE memory in case of switching from FB coding - pending a review by Huawei */ #define NONBE_FIX_1277_EVS_DTX_HIGH_RATE_THRESHOLD /* VA/Eri: issue 1277: Fix Mismatch in DTX high-rate threshold between EVS float and BASOP */ /* ##################### End NON-BE switches ########################### */ /* ################## End DEVELOPMENT switches ######################### */ Loading
lib_enc/swb_pre_proc.c +4 −0 Original line number Diff line number Diff line Loading @@ -442,7 +442,11 @@ void swb_pre_proc( if ( st->last_extl != SWB_BWE && st->last_extl != FB_BWE ) { /* resample 48 kHz to 32kHz */ #ifdef NONBE_1244_FIX_SWB_BWE_MEMORY if ( ( st->last_bwidth == FB && st->element_mode == EVS_MONO ) || ( st->bwidth == FB && st->element_mode > EVS_MONO ) ) // note: once EVS i CR fixed, the condition will simplify to "if ( st->bwidth == FB )" only #else if ( st->last_bwidth == FB ) #endif { inner_frame = L_FRAME48k; inner_Fs = 48000; Loading