Loading lib_dec/ivas_ism_dtx_dec.c +1 −30 Original line number Diff line number Diff line Loading @@ -183,29 +183,6 @@ ivas_error ivas_ism_dtx_dec( if ( !st_ivas->bfi ) { #ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT int16_t L_frame = -1, bwidth = -1; /* read 'sce_id_dtx' ISM parameters for replication to ISM objects with no SID */ /* note: 'sce_id_dtx' ISM parameters are read again in ivas_decision_matrix_dec() */ if ( ivas_total_brate == IVAS_SID_5k2 ) { st = st_ivas->hSCE[0]->hCoreCoder[0]; st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream; st->total_brate = SID_2k40; /* just to avoid BER complaints; true 'total_brate' is set at the beginning of ivas_sce_dec() */ bwidth = get_indice( st, 1, 2 ); if ( get_indice( st, 1 + 2, 1 ) ) { L_frame = L_FRAME16k; } else { L_frame = L_FRAME; } } #endif for ( ch = 0; ch < st_ivas->nchan_transport; ch++ ) { #ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT Loading @@ -213,13 +190,7 @@ ivas_error ivas_ism_dtx_dec( st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream; st->next_bit_pos = 0; /* note: needed in paramISM -> discISM switching */ st->cng_ism_flag = 1; /* ISM objects with no SID: replicate 'sce_id_dtx' ISM parameters */ if ( ivas_total_brate == IVAS_SID_5k2 && ch != sce_id_dtx ) { st->bwidth = bwidth; st->L_frame = L_frame; } st->L_frame = min( st->L_frame, L_FRAME16k ); /* note: needed for switching from active frame with L_frame=640 to CNG in object with no SID */ #else ivas_ism_preprocessing( st_ivas, ch ); // VE: after the acceptance of switches, replace the function call by its content #endif Loading Loading
lib_dec/ivas_ism_dtx_dec.c +1 −30 Original line number Diff line number Diff line Loading @@ -183,29 +183,6 @@ ivas_error ivas_ism_dtx_dec( if ( !st_ivas->bfi ) { #ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT int16_t L_frame = -1, bwidth = -1; /* read 'sce_id_dtx' ISM parameters for replication to ISM objects with no SID */ /* note: 'sce_id_dtx' ISM parameters are read again in ivas_decision_matrix_dec() */ if ( ivas_total_brate == IVAS_SID_5k2 ) { st = st_ivas->hSCE[0]->hCoreCoder[0]; st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream; st->total_brate = SID_2k40; /* just to avoid BER complaints; true 'total_brate' is set at the beginning of ivas_sce_dec() */ bwidth = get_indice( st, 1, 2 ); if ( get_indice( st, 1 + 2, 1 ) ) { L_frame = L_FRAME16k; } else { L_frame = L_FRAME; } } #endif for ( ch = 0; ch < st_ivas->nchan_transport; ch++ ) { #ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT Loading @@ -213,13 +190,7 @@ ivas_error ivas_ism_dtx_dec( st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream; st->next_bit_pos = 0; /* note: needed in paramISM -> discISM switching */ st->cng_ism_flag = 1; /* ISM objects with no SID: replicate 'sce_id_dtx' ISM parameters */ if ( ivas_total_brate == IVAS_SID_5k2 && ch != sce_id_dtx ) { st->bwidth = bwidth; st->L_frame = L_frame; } st->L_frame = min( st->L_frame, L_FRAME16k ); /* note: needed for switching from active frame with L_frame=640 to CNG in object with no SID */ #else ivas_ism_preprocessing( st_ivas, ch ); // VE: after the acceptance of switches, replace the function call by its content #endif Loading