Commit f0ae4f5b authored by vaclav's avatar vaclav
Browse files

adjustments within FIX_ISM_DTX_CNG_BWIDTH_ALT to read from the bitstream only once

parent d8f6a005

lib_dec/ivas_ism_dtx_dec.c

+26 −11
Original line number Diff line number Diff line
@@ -183,28 +183,43 @@ ivas_error ivas_ism_dtx_dec( 


    if ( !st_ivas->bfi )

    {

        for ( ch = 0; ch < st_ivas->nchan_transport; ch++ )

        {

#ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT

            st = st_ivas->hSCE[ch]->hCoreCoder[0];

            st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream;

            st->next_bit_pos = 0; /* note: needed in paramISM -> discISM switching */

            st->cng_ism_flag = 1;

        int16_t L_frame = -1, bwidth = -1;



            /* ISM objects with no SID: replicate 'sce_id_dtx' ISM parameters */

            if ( ivas_total_brate == IVAS_SID_5k2 && ch != sce_id_dtx ) /* note: 'sce_id_dtx' ISM parameters are read in ivas_decision_matrix_dec() */

        /* read 'sce_id_dtx' ISM parameters for replication to ISM objects with no SID */

        /* note: 'sce_id_dtx' ISM parameters are read again in ivas_decision_matrix_dec() */

        if ( ivas_total_brate == IVAS_SID_5k2 )

        {

            st = st_ivas->hSCE[0]->hCoreCoder[0];

            st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream;

            st->total_brate = SID_2k40; /* just to avoid BER complaints; true 'total_brate' is set at the beginning of ivas_sce_dec() */

                st->bwidth = get_indice( st, 1, 2 );



            bwidth = get_indice( st, 1, 2 );

            if ( get_indice( st, 1 + 2, 1 ) )

            {

                    st->L_frame = L_FRAME16k;

                L_frame = L_FRAME16k;

            }

            else

            {

                    st->L_frame = L_FRAME;

                L_frame = L_FRAME;

            }

        }

#endif



        for ( ch = 0; ch < st_ivas->nchan_transport; ch++ )

        {

#ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT

            st = st_ivas->hSCE[ch]->hCoreCoder[0];

            st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream;

            st->next_bit_pos = 0; /* note: needed in paramISM -> discISM switching */

            st->cng_ism_flag = 1;



            /* ISM objects with no SID: replicate 'sce_id_dtx' ISM parameters */

            if ( ivas_total_brate == IVAS_SID_5k2 && ch != sce_id_dtx )

            {

                st->bwidth = bwidth;

                st->L_frame = L_frame;

            }

#else

            ivas_ism_preprocessing( st_ivas, ch ); // VE: after the acceptance of switches, replace the function call by its content

#endif