Loading lib_dec/acelp_core_dec.c +1 −1 Original line number Diff line number Diff line Loading @@ -622,7 +622,7 @@ ivas_error acelp_core_dec( if ( st->coder_type == TRANSITION && tc_subfr < L_SUBFR && st->L_frame == L_FRAME ) { #ifdef NONBE_FIX_GSC_BSTR config_acelp1( DEC, st->total_brate, st->core_brate, st->core, st->extl_orig, st->extl_brate_orig, st->L_frame, -1, &( st->acelp_cfg ), st->next_bit_pos, st->coder_type, st->inactive_coder_type_flag, tc_subfr, 2, &nb_bits, unbits, st->element_mode, &uc_two_stage_flag, tdm_lp_reuse_flag, tdm_low_rate_mode, st->idchan, st->active_cnt, tdm_Pitch_reuse_flag, st->tdm_LRTD_flag, st->GSC_IVAS_mode ); config_acelp1( DEC, st->total_brate, st->core_brate, st->core, st->extl_orig, st->extl_brate_orig, st->L_frame, -1, &( st->acelp_cfg ), st->next_bit_pos, TRANSITION, -1, tc_subfr, 2, &nb_bits, unbits, st->element_mode, &uc_two_stage_flag, tdm_lp_reuse_flag, tdm_low_rate_mode, st->idchan, st->active_cnt, tdm_Pitch_reuse_flag, st->tdm_LRTD_flag, st->GSC_IVAS_mode ); #else config_acelp1( DEC, st->total_brate, st->core_brate, st->core, st->extl_orig, st->extl_brate_orig, st->L_frame, -1, &( st->acelp_cfg ), st->next_bit_pos, st->coder_type, tc_subfr, 2, &nb_bits, unbits, st->element_mode, &uc_two_stage_flag, tdm_lp_reuse_flag, tdm_low_rate_mode, st->idchan, st->active_cnt, tdm_Pitch_reuse_flag, st->tdm_LRTD_flag, st->GSC_IVAS_mode ); #endif Loading Loading
lib_dec/acelp_core_dec.c +1 −1 Original line number Diff line number Diff line Loading @@ -622,7 +622,7 @@ ivas_error acelp_core_dec( if ( st->coder_type == TRANSITION && tc_subfr < L_SUBFR && st->L_frame == L_FRAME ) { #ifdef NONBE_FIX_GSC_BSTR config_acelp1( DEC, st->total_brate, st->core_brate, st->core, st->extl_orig, st->extl_brate_orig, st->L_frame, -1, &( st->acelp_cfg ), st->next_bit_pos, st->coder_type, st->inactive_coder_type_flag, tc_subfr, 2, &nb_bits, unbits, st->element_mode, &uc_two_stage_flag, tdm_lp_reuse_flag, tdm_low_rate_mode, st->idchan, st->active_cnt, tdm_Pitch_reuse_flag, st->tdm_LRTD_flag, st->GSC_IVAS_mode ); config_acelp1( DEC, st->total_brate, st->core_brate, st->core, st->extl_orig, st->extl_brate_orig, st->L_frame, -1, &( st->acelp_cfg ), st->next_bit_pos, TRANSITION, -1, tc_subfr, 2, &nb_bits, unbits, st->element_mode, &uc_two_stage_flag, tdm_lp_reuse_flag, tdm_low_rate_mode, st->idchan, st->active_cnt, tdm_Pitch_reuse_flag, st->tdm_LRTD_flag, st->GSC_IVAS_mode ); #else config_acelp1( DEC, st->total_brate, st->core_brate, st->core, st->extl_orig, st->extl_brate_orig, st->L_frame, -1, &( st->acelp_cfg ), st->next_bit_pos, st->coder_type, tc_subfr, 2, &nb_bits, unbits, st->element_mode, &uc_two_stage_flag, tdm_lp_reuse_flag, tdm_low_rate_mode, st->idchan, st->active_cnt, tdm_Pitch_reuse_flag, st->tdm_LRTD_flag, st->GSC_IVAS_mode ); #endif Loading