Commit 58a57c20 authored by Vidhya V P's avatar Vidhya V P
Browse files

Minor modifications

[x] Added missing braces in the undefined part of the clean up code
[x] Proper indendation added to the encoder reconfiguration function
parent dfe0767b
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+1 −1
Original line number Diff line number Diff line
@@ -145,7 +145,7 @@
#ifdef SBA_BR_SWITCHING
#define SBA_BR_SWITCHING_RECONFIG                       /* Issue 114: Changes for SBA bitrate switching with reconfiguration for bitrates with different number of transport channels*/
#define SBA_BR_SWITCHING_COMPLEXITY_FIX                 /* VA: fix complexity overhead */ 
#define SBA_BR_SWITCHING_CLEAN_UP
#define SBA_BR_SWITCHING_CLEAN_UP                       /*Issue 114: Clean up changes for the SBA reconfiguation functions*/
#endif
#define FIX_I59_DELAY_ROUNDING                          /* Issue 59: rounding in sample domain instead of nanosec for IVAS_ENC_GetDelay() and IVAS_DEC_GetDelay() */
#define FIX_FIX_I59                                     /* Issue 59:  small fix concerning LFE delay rounding */
+49 −50
Original line number Diff line number Diff line
@@ -517,7 +517,6 @@ ivas_error ivas_sba_enc_reconfigure(
                    }
                }
            }
        }
#ifndef SBA_BR_SWITCHING_CLEAN_UP
            /* initalize delay for SPAR/DirAC delay synchronization */
            if ( ( st_ivas->sba_mode == SBA_MODE_DIRAC ) && ( ( sba_mode_old != st_ivas->sba_mode ) || ( nchan_transport_old != st_ivas->nchan_transport ) ) )
@@ -554,10 +553,11 @@ ivas_error ivas_sba_enc_reconfigure(
                }
                hDirAC->num_samples_synchro_delay = 0;
            }
    }

#endif

#endif
        }
        ivas_dirac_enc_reconfigure( st_ivas );

#ifdef SBA_BR_SWITCHING
@@ -594,6 +594,5 @@ ivas_error ivas_sba_enc_reconfigure(
        }
#endif
    }

    return error;
}
+2 −6
Original line number Diff line number Diff line
@@ -76,6 +76,7 @@ ivas_error ivas_spar_enc_open(
    hEncoderConfig = st_ivas->hEncoderConfig;
    error = IVAS_ERR_OK;
#ifdef SBA_BR_SWITCHING_CLEAN_UP
    hSpar = st_ivas->hSpar;
    if ( !spar_reconfig_flag )
    {
#endif
@@ -86,10 +87,6 @@ ivas_error ivas_spar_enc_open(
        }
#ifdef SBA_BR_SWITCHING_CLEAN_UP
    }
    else
    {
        hSpar = st_ivas->hSpar;
    }
#endif
    input_Fs = hEncoderConfig->input_Fs;
    sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER );
@@ -128,8 +125,7 @@ ivas_error ivas_spar_enc_open(
#ifdef SBA_BR_SWITCHING_CLEAN_UP
    /* initialization */
    hSpar->hMdEnc->table_idx = -1;
#endif
#ifdef SBA_BR_SWITCHING_CLEAN_UP

    if ( !spar_reconfig_flag )
    {
#endif