Commit 5e1729e2 authored by vaclav's avatar vaclav
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Merge branch...

Merge branch '1214-audible-glitch-sound-in-decoded-transport-audio-with-masa-2tc-rate-switching-and-fer' into 'main'

[non-BE] Resolve "Audible glitch sound in decoded transport audio in rate switching and FER"

See merge request !1899
parents 755253d9 662c0654
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+1 −0
Original line number Diff line number Diff line
@@ -173,6 +173,7 @@
#define NONBE_1215_FIX_JBM_MAX_SCALING                  /* FhG: issue 1215: Fix assert hit in a specific VoIP decoder config. Caused by integer overflow in max scaling calculation. */
#define NONBE_FIX_1255_OBJ_EDIT_JBM                     /* VA: issue 1255: restore object editing in JBM */
#define NONBE_FIX_1189_GSC_IVAS_OMASA                   /* VA: Fix for issue 1189: Bitstream desynchornization due to reading/writing of the GSC_IVAS_mode parameter */
#define NONBE_1214_PLC_LSF_MEMORY                       /* VA: issue 1224: reset ACELP PLC FEC memory in case of switching from MDCT stereo to TD/DFT stereo */

/* ##################### End NON-BE switches ########################### */

+6 −0
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@@ -263,8 +263,14 @@ ivas_error core_switching_pre_dec(
        st->uv_count = 0;
    }

#ifdef NONBE_1214_PLC_LSF_MEMORY
    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ ||
         ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) ||
         ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ )
#else
    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 &&
                                                                                                    st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) )
#endif
    {
        if ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD )
        {
+6 −0
Original line number Diff line number Diff line
@@ -171,7 +171,13 @@ void core_switching_pre_enc(
        st->uv_count = 0;
    }

#ifdef NONBE_1214_PLC_LSF_MEMORY
    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ ||
         ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) ||
         ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ )
#else
    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) )
#endif
    {
        /* Reset the ACELP core in case of HQ->ACELP core switching */