Loading lib_com/ivas_cnst.h +0 −7 Original line number Diff line number Diff line Loading @@ -165,9 +165,6 @@ typedef enum #define HEAD_ROTATION_HOA_ORDER 3 /* HOA 3rd order */ #define MAX_CICP_CHANNELS 16 /* max channels for loudspeaker layouts (16 for custom layouts)*/ #define MAX_OUTPUT_CHANNELS 16 /* Maximum number of output channels (HOA 3rd order) */ #ifndef FIX_DIRAC_CHANNELS #define IVAS_MAX_NUM_CH 16 /* == MAX_OUTPUT_CHANNELS */ #endif #define BINAURAL_CHANNELS 2 /* number of channels for binaural output configuration */ #define CPE_CHANNELS 2 /* number of CPE (stereo) channels */ Loading Loading @@ -856,11 +853,7 @@ typedef enum * DirAC Constants *----------------------------------------------------------------------------------*/ #ifdef FIX_DIRAC_CHANNELS #define DIRAC_MAX_ANA_CHANS FOA_CHANNELS /* Maximum number of channels for DirAC analysis */ #else #define DIRAC_MAX_ANA_CHANS 4 /* Maximum number of channels for DirAC analysis */ #endif #ifndef HARMONIZE_SBA_NCHAN_TRANSPORT #define DIRAC_MAX_TRANS_CHANS 8 /* Maximum number of transport channels for DirAC */ Loading lib_com/options.h +0 −1 Original line number Diff line number Diff line Loading @@ -146,7 +146,6 @@ #define FADE_TO_ZERO_FOR_TOO_LONG_FRAMELOSS /*#define FIX_I1_113*/ /* under review : MCT bit distribution optimization for SBA high bitrates*/ #define FIX_DIRAC_CHANNELS /* Issue 71: lower number of DirAC analysis channels */ #define HARMONIZE_SBA_NCHAN_TRANSPORT /* harmonize setting of number of transport channels in SBA */ #define FIX_I13_TCX_TNS_ISSUE /* Issue 13: Fix reported artifacts. Bug in TNS with TCX5 */ #define SRAM_REDUCTION_BINRENDERER /* Issue 145: reduction of static RAM usage in fastconv binaural renderer */ Loading lib_enc/ivas_dirac_enc.c +1 −22 Original line number Diff line number Diff line Loading @@ -122,29 +122,16 @@ ivas_error ivas_dirac_enc_open( if ( st_ivas->sba_mode == SBA_MODE_DIRAC ) { hDirAC->num_samples_synchro_delay = NS2SA( input_Fs, IVAS_FB_ENC_DELAY_NS ); #ifdef FIX_DIRAC_CHANNELS for ( i = 0; i < DIRAC_MAX_ANA_CHANS; i++ ) #else for ( i = 0; i < st_ivas->hEncoderConfig->nchan_inp; i++ ) #endif { hDirAC->sba_synchro_buffer[i] = (float *) count_malloc( hDirAC->num_samples_synchro_delay * sizeof( float ) ); set_zero( hDirAC->sba_synchro_buffer[i], hDirAC->num_samples_synchro_delay ); } #ifndef FIX_DIRAC_CHANNELS for ( ; i < IVAS_MAX_NUM_CH; i++ ) { hDirAC->sba_synchro_buffer[i] = NULL; } #endif } else { #ifdef FIX_DIRAC_CHANNELS for ( i = 0; i < DIRAC_MAX_ANA_CHANS; i++ ) #else for ( i = 0; i < IVAS_MAX_NUM_CH; i++ ) #endif { hDirAC->sba_synchro_buffer[i] = NULL; } Loading Loading @@ -252,11 +239,7 @@ void ivas_dirac_enc_close( ivas_FB_mixer_close( &hDirAC->hFbMixer, input_Fs ); } #ifdef FIX_DIRAC_CHANNELS for ( i = 0; i < DIRAC_MAX_ANA_CHANS; i++ ) #else for ( i = 0; i < IVAS_MAX_NUM_CH; i++ ) #endif { if ( hDirAC->sba_synchro_buffer[i] != NULL ) { Loading Loading @@ -470,11 +453,7 @@ void ivas_dirac_enc_spar_delay_synchro( int16_t ch_idx; float tmp_buffer[L_FRAME48k]; #ifdef FIX_DIRAC_CHANNELS for ( ch_idx = 0; ch_idx < DIRAC_MAX_ANA_CHANS; ch_idx++ ) #else for ( ch_idx = 0; ch_idx < st_ivas->hEncoderConfig->nchan_inp; ch_idx++ ) #endif { mvr2r( data_f[ch_idx], tmp_buffer, input_frame ); mvr2r( st_ivas->hDirAC->sba_synchro_buffer[ch_idx], data_f[ch_idx], st_ivas->hDirAC->num_samples_synchro_delay ); Loading lib_enc/ivas_stat_enc.h +0 −4 Original line number Diff line number Diff line Loading @@ -572,11 +572,7 @@ typedef struct ivas_dirac_enc_data_structure PARAM_ISM_CONFIG_HANDLE hParamIsm; /* Parametric ISM handle */ IVAS_FB_MIXER_HANDLE hFbMixer; #ifdef FIX_DIRAC_CHANNELS float *sba_synchro_buffer[DIRAC_MAX_ANA_CHANS]; #else float *sba_synchro_buffer[IVAS_MAX_NUM_CH]; // VE: all 16 buffers not needed ? #endif int16_t num_samples_synchro_delay; /* DirAC parameter estimation */ Loading Loading
lib_com/ivas_cnst.h +0 −7 Original line number Diff line number Diff line Loading @@ -165,9 +165,6 @@ typedef enum #define HEAD_ROTATION_HOA_ORDER 3 /* HOA 3rd order */ #define MAX_CICP_CHANNELS 16 /* max channels for loudspeaker layouts (16 for custom layouts)*/ #define MAX_OUTPUT_CHANNELS 16 /* Maximum number of output channels (HOA 3rd order) */ #ifndef FIX_DIRAC_CHANNELS #define IVAS_MAX_NUM_CH 16 /* == MAX_OUTPUT_CHANNELS */ #endif #define BINAURAL_CHANNELS 2 /* number of channels for binaural output configuration */ #define CPE_CHANNELS 2 /* number of CPE (stereo) channels */ Loading Loading @@ -856,11 +853,7 @@ typedef enum * DirAC Constants *----------------------------------------------------------------------------------*/ #ifdef FIX_DIRAC_CHANNELS #define DIRAC_MAX_ANA_CHANS FOA_CHANNELS /* Maximum number of channels for DirAC analysis */ #else #define DIRAC_MAX_ANA_CHANS 4 /* Maximum number of channels for DirAC analysis */ #endif #ifndef HARMONIZE_SBA_NCHAN_TRANSPORT #define DIRAC_MAX_TRANS_CHANS 8 /* Maximum number of transport channels for DirAC */ Loading
lib_com/options.h +0 −1 Original line number Diff line number Diff line Loading @@ -146,7 +146,6 @@ #define FADE_TO_ZERO_FOR_TOO_LONG_FRAMELOSS /*#define FIX_I1_113*/ /* under review : MCT bit distribution optimization for SBA high bitrates*/ #define FIX_DIRAC_CHANNELS /* Issue 71: lower number of DirAC analysis channels */ #define HARMONIZE_SBA_NCHAN_TRANSPORT /* harmonize setting of number of transport channels in SBA */ #define FIX_I13_TCX_TNS_ISSUE /* Issue 13: Fix reported artifacts. Bug in TNS with TCX5 */ #define SRAM_REDUCTION_BINRENDERER /* Issue 145: reduction of static RAM usage in fastconv binaural renderer */ Loading
lib_enc/ivas_dirac_enc.c +1 −22 Original line number Diff line number Diff line Loading @@ -122,29 +122,16 @@ ivas_error ivas_dirac_enc_open( if ( st_ivas->sba_mode == SBA_MODE_DIRAC ) { hDirAC->num_samples_synchro_delay = NS2SA( input_Fs, IVAS_FB_ENC_DELAY_NS ); #ifdef FIX_DIRAC_CHANNELS for ( i = 0; i < DIRAC_MAX_ANA_CHANS; i++ ) #else for ( i = 0; i < st_ivas->hEncoderConfig->nchan_inp; i++ ) #endif { hDirAC->sba_synchro_buffer[i] = (float *) count_malloc( hDirAC->num_samples_synchro_delay * sizeof( float ) ); set_zero( hDirAC->sba_synchro_buffer[i], hDirAC->num_samples_synchro_delay ); } #ifndef FIX_DIRAC_CHANNELS for ( ; i < IVAS_MAX_NUM_CH; i++ ) { hDirAC->sba_synchro_buffer[i] = NULL; } #endif } else { #ifdef FIX_DIRAC_CHANNELS for ( i = 0; i < DIRAC_MAX_ANA_CHANS; i++ ) #else for ( i = 0; i < IVAS_MAX_NUM_CH; i++ ) #endif { hDirAC->sba_synchro_buffer[i] = NULL; } Loading Loading @@ -252,11 +239,7 @@ void ivas_dirac_enc_close( ivas_FB_mixer_close( &hDirAC->hFbMixer, input_Fs ); } #ifdef FIX_DIRAC_CHANNELS for ( i = 0; i < DIRAC_MAX_ANA_CHANS; i++ ) #else for ( i = 0; i < IVAS_MAX_NUM_CH; i++ ) #endif { if ( hDirAC->sba_synchro_buffer[i] != NULL ) { Loading Loading @@ -470,11 +453,7 @@ void ivas_dirac_enc_spar_delay_synchro( int16_t ch_idx; float tmp_buffer[L_FRAME48k]; #ifdef FIX_DIRAC_CHANNELS for ( ch_idx = 0; ch_idx < DIRAC_MAX_ANA_CHANS; ch_idx++ ) #else for ( ch_idx = 0; ch_idx < st_ivas->hEncoderConfig->nchan_inp; ch_idx++ ) #endif { mvr2r( data_f[ch_idx], tmp_buffer, input_frame ); mvr2r( st_ivas->hDirAC->sba_synchro_buffer[ch_idx], data_f[ch_idx], st_ivas->hDirAC->num_samples_synchro_delay ); Loading
lib_enc/ivas_stat_enc.h +0 −4 Original line number Diff line number Diff line Loading @@ -572,11 +572,7 @@ typedef struct ivas_dirac_enc_data_structure PARAM_ISM_CONFIG_HANDLE hParamIsm; /* Parametric ISM handle */ IVAS_FB_MIXER_HANDLE hFbMixer; #ifdef FIX_DIRAC_CHANNELS float *sba_synchro_buffer[DIRAC_MAX_ANA_CHANS]; #else float *sba_synchro_buffer[IVAS_MAX_NUM_CH]; // VE: all 16 buffers not needed ? #endif int16_t num_samples_synchro_delay; /* DirAC parameter estimation */ Loading