Commit 6b03e363 authored by fotopoulou's avatar fotopoulou
Browse files

Merge branch 'fix_issue_1329_alt' into 'main'

Alternative fix for OSBA issue 1329

See merge request !2164
parents 6fd93f93 967fb6e2
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+5 −3
Original line number Diff line number Diff line
@@ -77,7 +77,8 @@
#endif

#ifdef DEBUG_MODE_MDCT
/*#define DEBUG_PLOT_BITS*/
#define DEBUG_PLOT_BITS
#define DEBUG_OSBA_MD_BITS
#endif

#ifdef DEBUG_MODE_DFT
@@ -174,6 +175,7 @@
#define NONBE_1244_FIX_SWB_BWE_MEMORY                   /* VA: issue 1244: fix to SWB BWE memory in case of switching from FB coding - pending a review by Huawei */ 
#define NONBE_1122_KEEP_EVS_MODE_UNCHANGED              /* FhG: Disables fix for issue 1122 in EVS mode to keep BE tests green. This switch should be removed once the 1122 fix is added to EVS via a CR.  */
#define NONBE_FIX_1337_MISSING_DIRECTIVITY_DISTATT_EXTREND /* Eri: issue 1337: Missing directivity setting and distance attenuation in external renderer IVAS_rend */
#define NONBE_1329_FIX_OSBA_CRASH                       /* FhG: issue 1329: prevent assert when bit budget is low*/

/* ##################### End NON-BE switches ########################### */

+15 −0
Original line number Diff line number Diff line
@@ -565,6 +565,12 @@ void writeTCXparam(
                                                            nbits_tcx, NPRM_RESQ * st->hTcxCfg->resq, flag_ctx_hm ? &hm_cfg[k] : NULL );
                }
            }
#ifdef DEBUG_PLOT_BITS
            if ( core == TCX_10_CORE )
            {
                dbgwrite( &nbits_tcx, sizeof( int16_t ), 1, 1, "./res/bits_RC" );
            }
#endif
        }
    }
#ifdef DEBUG_PLOT_BITS
@@ -576,6 +582,15 @@ void writeTCXparam(
            dbgwrite( &tmp, sizeof( int16_t ), 1, 1, "./res/bits_TNS" );
        }
    }
    else
    {
        if ( nSubframes == 1 )
        {
            tmp = 0;
            dbgwrite( &nbits_tcx, sizeof( int16_t ), 1, 1, "./res/bits_RC" );
            dbgwrite( &tmp, sizeof( int16_t ), 1, 1, "./res/bits_RC" );
        }
    }
#endif

    return;
+5 −0
Original line number Diff line number Diff line
@@ -412,6 +412,11 @@ ivas_error ivas_enc(
            /* get SBA TCs */
            ivas_sba_getTCs( &data_f[n], st_ivas, input_frame );
        }
#ifdef DEBUG_OSBA_MD_BITS
        {
            dbgwrite( &nb_bits_metadata[0], sizeof( int16_t ), hEncoderConfig->nchan_ism + 1, 1, "./res/osba_md_bits" );
        }
#endif

        /* core-coding of transport channels */
        if ( st_ivas->nSCE == 1 )
+8 −0
Original line number Diff line number Diff line
@@ -471,6 +471,10 @@ void ivas_mct_core_enc(
        /*write IGF data to bitstream*/
        for ( ch = 0; ch < nChannels; ch++ )
        {
#ifdef DEBUG_PLOT_BITS
            int16_t tmp = hBstr->nb_bits_tot;
#endif

            st = sts[ch];
            if (
                sts[ch]->mct_chan_mode == MCT_CHAN_MODE_IGNORE )
@@ -478,6 +482,10 @@ void ivas_mct_core_enc(
                continue;
            }
            enc_prm_igf_mdct( st, hBstr );
#ifdef DEBUG_PLOT_BITS
            tmp = hBstr->nb_bits_tot - tmp;
            dbgwrite( &tmp, sizeof( int16_t ), 1, 1, "./res/bits_IGF" );
#endif
        }
    }

+8 −0
Original line number Diff line number Diff line
@@ -1146,6 +1146,9 @@ void ivas_mdct_core_whitening_enc(
        skipped_first_channel = 0;
        for ( ch = 0; ch < CPE_CHANNELS; ch++ )
        {
#ifdef DEBUG_PLOT_BITS
            int16_t tmp = hBstr->nb_bits_tot;
#endif
            st = sts[ch];

            if ( st->mct_chan_mode == MCT_CHAN_MODE_IGNORE )
@@ -1170,6 +1173,11 @@ void ivas_mdct_core_whitening_enc(
            }
            encode_lpc_avq( hBstr, num_sns, param_lpc[ch], st->core, st->element_mode );

#ifdef DEBUG_PLOT_BITS
            tmp = hBstr->nb_bits_tot - tmp;
            dbgwrite( &tmp, sizeof( int16_t ), 1, 1, "./res/bits_SNS" );
#endif

            st->side_bits_frame_channel += hBstr->nb_bits_tot - nbits_start_sns;
        }
    }
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