Loading lib_dec/core_switching_dec.c +2 −1 Original line number Diff line number Diff line Loading @@ -264,7 +264,8 @@ ivas_error core_switching_pre_dec( } #ifdef NONBE_1214_PLC_LSF_MEMORY if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) || if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) || ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ ) #else if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && Loading lib_enc/core_switching_enc.c +2 −1 Original line number Diff line number Diff line Loading @@ -172,7 +172,8 @@ void core_switching_pre_enc( } #ifdef NONBE_1214_PLC_LSF_MEMORY if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) || if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) || ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ ) #else if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) ) Loading Loading
lib_dec/core_switching_dec.c +2 −1 Original line number Diff line number Diff line Loading @@ -264,7 +264,8 @@ ivas_error core_switching_pre_dec( } #ifdef NONBE_1214_PLC_LSF_MEMORY if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) || if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) || ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ ) #else if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && Loading
lib_enc/core_switching_enc.c +2 −1 Original line number Diff line number Diff line Loading @@ -172,7 +172,8 @@ void core_switching_pre_enc( } #ifdef NONBE_1214_PLC_LSF_MEMORY if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) || if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) || ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ ) #else if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) ) Loading