Loading lib_com/options.h +1 −1 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ #endif /*#define SPAR_HOA_DBG*/ /* SPAR HOA debug statements */ /*#define DEBUG_BINAURAL_FILTER_DESIGN*/ /* debugging of Crend binaural filter design */ #define DEBUG_AGC_ENCODER_CMD_OPTION /* Ability to force enable or disable AGC behaviour in DIRAC/SPAR via command line option */ //#define DEBUG_AGC_ENCODER_CMD_OPTION /* Ability to force enable or disable AGC behaviour in DIRAC/SPAR via command line option */ #endif /* #################### End DEBUGGING switches ############################ */ Loading tests/conftest.py +0 −4 Original line number Diff line number Diff line Loading @@ -196,7 +196,6 @@ class EncoderFrontend: sba_order: Optional[str] = None, dtx_mode: Optional[bool] = False, max_band: Optional[str] = None, agc_op: Optional[int] = None, bypass_mode: Optional[int] = None, quiet_mode: Optional[bool] = True, add_option_list: Optional[list] = None, Loading @@ -213,9 +212,6 @@ class EncoderFrontend: if max_band is not None: command.extend(["-max_band", max_band]) if agc_op is not None: command.extend(["-agc", str(agc_op)]) if bypass_mode is not None: command.extend(["-bypass", str(bypass_mode)]) Loading tests/test_sba_bs_dec_plc.py +1 −8 Original line number Diff line number Diff line Loading @@ -47,7 +47,6 @@ plc_patterns = ['PLperc12mblen5', 'PLperc40mblen50', 'PLperc42mblen2'] dtx_set = ['0', '1'] ivas_br_list = ['32000', '64000', '96000', '256000'] sampling_rate_list = ['48', '32', '16'] agc_list = [-1, 0, 1] AbsTol = '0' Loading @@ -73,7 +72,6 @@ def check_and_makedir(dir_path): @pytest.mark.parametrize("tag", tag_list) @pytest.mark.parametrize("plc_pattern", plc_patterns) @pytest.mark.parametrize("fs", sampling_rate_list) @pytest.mark.parametrize("agc", agc_list) def test_sba_plc_system( dut_decoder_frontend: DecoderFrontend, test_vector_path, Loading @@ -86,8 +84,7 @@ def test_sba_plc_system( dtx, tag, plc_pattern, fs, agc fs ): if dtx == '1' and ivas_br not in ['32000', '64000']: # skip high bitrates for DTX until DTX issue is resolved Loading @@ -108,7 +105,6 @@ def test_sba_plc_system( dtx, plc_pattern, update_ref, agc, keep_files, ) Loading @@ -127,15 +123,12 @@ def sba_dec_plc( dtx, plc_pattern, update_ref, agc, keep_files, ): # ------------ run cmd ------------ tag_out = f"{tag}_ivasbr{ivas_br[:-3]}k_DTX{dtx}" if agc != -1: tag_out += f'_AGC{agc}' plc_tag_out = f"{tag_out}_{plc_pattern}" dut_out_dir = f"{dut_base_path}/sba_bs/raw" Loading tests/test_sba_bs_enc.py +4 −36 Original line number Diff line number Diff line Loading @@ -59,7 +59,6 @@ ivas_br_HOA3 = ['256000', '384000', '512000'] sample_rate_list = ['48', '32', '16'] bypass_list = [1, 2] agc_list = [-1, 0, 1] sample_rate_bw_idx_list = [('48', 'SWB'), ('48', 'WB'), ('32', 'WB')] Loading Loading @@ -100,7 +99,6 @@ def test_bypass_enc( ivas_br = '256000' dtx = '0' max_bw = "FB" agc = -1 sba_order = "+1" output_config = "FOA" Loading @@ -118,7 +116,6 @@ def test_bypass_enc( dtx, max_bw, bypass, agc, sba_order, update_ref, cut_testv=True Loading @@ -136,7 +133,6 @@ def test_bypass_enc( dtx, max_bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -148,7 +144,6 @@ def test_bypass_enc( @pytest.mark.parametrize("dtx", dtx_set) @pytest.mark.parametrize("tag", tag_list) @pytest.mark.parametrize("fs", sample_rate_list) @pytest.mark.parametrize("agc", agc_list) def test_sba_enc_system( dut_encoder_frontend: EncoderFrontend, dut_decoder_frontend: DecoderFrontend, Loading @@ -164,12 +159,11 @@ def test_sba_enc_system( dtx, tag, fs, agc, ): if dtx == '1' and ivas_br not in ['32000', '64000']: # skip high bitrates for DTX until DTX issue is resolved pytest.skip() if ivas_br == 'sw_24k4_256k.bin' and agc != 1: if ivas_br == 'sw_24k4_256k.bin': pytest.skip() tag = tag + fs + 'c' Loading @@ -177,9 +171,7 @@ def test_sba_enc_system( bypass = -1 sba_order = "+1" output_config = "FOA" if agc == 1: cut_gain = "16.0" elif dtx == '1': if dtx == '1': cut_gain = ".004" else: cut_gain = "1.0" Loading @@ -197,7 +189,6 @@ def test_sba_enc_system( dtx, max_bw, bypass, agc, sba_order, update_ref, cut_gain=cut_gain, Loading @@ -217,7 +208,6 @@ def test_sba_enc_system( dtx, max_bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -242,7 +232,6 @@ def test_spar_hoa2_enc_system( ): fs = '48' dtx = '0' agc = -1 tag = tag + fs + 'c' max_bw = "FB" Loading @@ -264,7 +253,6 @@ def test_spar_hoa2_enc_system( dtx, max_bw, bypass, agc, sba_order, update_ref, ) Loading @@ -281,7 +269,6 @@ def test_spar_hoa2_enc_system( dtx, max_bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -306,8 +293,6 @@ def test_spar_hoa3_enc_system( ): fs = '48' dtx = '0' agc = -1 tag = tag + fs + 'c' max_bw = "FB" bypass = -1 Loading @@ -328,7 +313,6 @@ def test_spar_hoa3_enc_system( dtx, max_bw, bypass, agc, sba_order, update_ref, ) Loading @@ -345,7 +329,6 @@ def test_spar_hoa3_enc_system( dtx, max_bw, bypass, agc, output_config, update_ref, keep_files, Loading Loading @@ -381,7 +364,6 @@ def test_sba_enc_BWforce_system( bw = sample_rate_bw_idx[1] tag = tag + fs + 'c' bypass = -1 agc = -1 sba_order = "+1" output_config = "FOA" Loading @@ -399,7 +381,6 @@ def test_sba_enc_BWforce_system( dtx, bw, bypass, agc, sba_order, update_ref, cut_testv=True Loading @@ -417,7 +398,6 @@ def test_sba_enc_BWforce_system( dtx, bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -439,7 +419,6 @@ def sba_enc( dtx, ivas_max_bw, bypass, agc, sba_order, update_ref, cut_gain='1.0', Loading @@ -466,20 +445,16 @@ def sba_enc( if ivas_br == 'sw_24k4_256k.bin': ivas_br = f"{br_switch_file_path}/sw_24k4_256k.bin" short_tag_ext = "" if agc != -1: short_tag_ext += f'_AGC{agc}' # we update only bypass = 0/2 (bypass 1 is the same as the baseline) if bypass in [0, 2]: short_tag_ext += f"_pca{bypass}" # to avoid conflicting names in case of parallel test execution, differentiate all cases long_tag_ext = f"_AGC{agc}" if agc != -1 else "_AGC-unspecified" long_tag_ext += f"_pca{bypass}" long_tag_ext = f"_pca{bypass}" dut_pkt_file = f"{dut_out_dir}/{tag_out}{long_tag_ext}.pkt" ref_pkt_file = f"{ref_out_dir}/{tag_out}{short_tag_ext}.pkt" ref_pkt_file_dutenc = f"{ref_out_dir}/{tag_out}{short_tag_ext}_dutenc.pkt" input_path = f"{test_vector_path}/{tag_in}{in_extension}" agc_op = agc if agc != -1 else None bypass_mode = bypass if bypass >= 0 else None dtx_mode = dtx == '1' Loading Loading @@ -507,7 +482,6 @@ def sba_enc( ref_pkt_file, sba_order=sba_order, max_band=ivas_max_bw, agc_op=agc_op, bypass_mode=bypass_mode, dtx_mode=dtx_mode, ) Loading @@ -520,7 +494,6 @@ def sba_enc( ref_pkt_file_dutenc, sba_order=sba_order, max_band=ivas_max_bw, agc_op=agc_op, bypass_mode=bypass_mode, dtx_mode=dtx_mode, ) Loading @@ -534,7 +507,6 @@ def sba_enc( dut_pkt_file, sba_order=sba_order, max_band=ivas_max_bw, agc_op=agc_op, bypass_mode=bypass_mode, dtx_mode=dtx_mode, ) Loading @@ -551,7 +523,6 @@ def sba_dec( dtx, ivas_max_bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -566,15 +537,12 @@ def sba_dec( tag_out = f"{tag}_ivasbr{ivas_br[:-3]}k_DTX{dtx}" short_tag_ext = "" if agc != -1: short_tag_ext += f'_AGC{agc}' # we update only bypass = 0/2 (bypass 1 is the same as the baseline) if bypass in [0, 2]: short_tag_ext += f"_pca{bypass}" # to avoid conflicting names in case of parallel test execution, differentiate all cases long_tag_ext = f"_AGC{agc}" if agc != -1 else "_AGC-unspecified" long_tag_ext += f"_pca{bypass}" long_tag_ext = f"_pca{bypass}" dut_out_dir = f"{dut_base_path}/sba_bs/raw" ref_out_dir = f"{reference_path}/sba_bs/raw" Loading Loading
lib_com/options.h +1 −1 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ #endif /*#define SPAR_HOA_DBG*/ /* SPAR HOA debug statements */ /*#define DEBUG_BINAURAL_FILTER_DESIGN*/ /* debugging of Crend binaural filter design */ #define DEBUG_AGC_ENCODER_CMD_OPTION /* Ability to force enable or disable AGC behaviour in DIRAC/SPAR via command line option */ //#define DEBUG_AGC_ENCODER_CMD_OPTION /* Ability to force enable or disable AGC behaviour in DIRAC/SPAR via command line option */ #endif /* #################### End DEBUGGING switches ############################ */ Loading
tests/conftest.py +0 −4 Original line number Diff line number Diff line Loading @@ -196,7 +196,6 @@ class EncoderFrontend: sba_order: Optional[str] = None, dtx_mode: Optional[bool] = False, max_band: Optional[str] = None, agc_op: Optional[int] = None, bypass_mode: Optional[int] = None, quiet_mode: Optional[bool] = True, add_option_list: Optional[list] = None, Loading @@ -213,9 +212,6 @@ class EncoderFrontend: if max_band is not None: command.extend(["-max_band", max_band]) if agc_op is not None: command.extend(["-agc", str(agc_op)]) if bypass_mode is not None: command.extend(["-bypass", str(bypass_mode)]) Loading
tests/test_sba_bs_dec_plc.py +1 −8 Original line number Diff line number Diff line Loading @@ -47,7 +47,6 @@ plc_patterns = ['PLperc12mblen5', 'PLperc40mblen50', 'PLperc42mblen2'] dtx_set = ['0', '1'] ivas_br_list = ['32000', '64000', '96000', '256000'] sampling_rate_list = ['48', '32', '16'] agc_list = [-1, 0, 1] AbsTol = '0' Loading @@ -73,7 +72,6 @@ def check_and_makedir(dir_path): @pytest.mark.parametrize("tag", tag_list) @pytest.mark.parametrize("plc_pattern", plc_patterns) @pytest.mark.parametrize("fs", sampling_rate_list) @pytest.mark.parametrize("agc", agc_list) def test_sba_plc_system( dut_decoder_frontend: DecoderFrontend, test_vector_path, Loading @@ -86,8 +84,7 @@ def test_sba_plc_system( dtx, tag, plc_pattern, fs, agc fs ): if dtx == '1' and ivas_br not in ['32000', '64000']: # skip high bitrates for DTX until DTX issue is resolved Loading @@ -108,7 +105,6 @@ def test_sba_plc_system( dtx, plc_pattern, update_ref, agc, keep_files, ) Loading @@ -127,15 +123,12 @@ def sba_dec_plc( dtx, plc_pattern, update_ref, agc, keep_files, ): # ------------ run cmd ------------ tag_out = f"{tag}_ivasbr{ivas_br[:-3]}k_DTX{dtx}" if agc != -1: tag_out += f'_AGC{agc}' plc_tag_out = f"{tag_out}_{plc_pattern}" dut_out_dir = f"{dut_base_path}/sba_bs/raw" Loading
tests/test_sba_bs_enc.py +4 −36 Original line number Diff line number Diff line Loading @@ -59,7 +59,6 @@ ivas_br_HOA3 = ['256000', '384000', '512000'] sample_rate_list = ['48', '32', '16'] bypass_list = [1, 2] agc_list = [-1, 0, 1] sample_rate_bw_idx_list = [('48', 'SWB'), ('48', 'WB'), ('32', 'WB')] Loading Loading @@ -100,7 +99,6 @@ def test_bypass_enc( ivas_br = '256000' dtx = '0' max_bw = "FB" agc = -1 sba_order = "+1" output_config = "FOA" Loading @@ -118,7 +116,6 @@ def test_bypass_enc( dtx, max_bw, bypass, agc, sba_order, update_ref, cut_testv=True Loading @@ -136,7 +133,6 @@ def test_bypass_enc( dtx, max_bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -148,7 +144,6 @@ def test_bypass_enc( @pytest.mark.parametrize("dtx", dtx_set) @pytest.mark.parametrize("tag", tag_list) @pytest.mark.parametrize("fs", sample_rate_list) @pytest.mark.parametrize("agc", agc_list) def test_sba_enc_system( dut_encoder_frontend: EncoderFrontend, dut_decoder_frontend: DecoderFrontend, Loading @@ -164,12 +159,11 @@ def test_sba_enc_system( dtx, tag, fs, agc, ): if dtx == '1' and ivas_br not in ['32000', '64000']: # skip high bitrates for DTX until DTX issue is resolved pytest.skip() if ivas_br == 'sw_24k4_256k.bin' and agc != 1: if ivas_br == 'sw_24k4_256k.bin': pytest.skip() tag = tag + fs + 'c' Loading @@ -177,9 +171,7 @@ def test_sba_enc_system( bypass = -1 sba_order = "+1" output_config = "FOA" if agc == 1: cut_gain = "16.0" elif dtx == '1': if dtx == '1': cut_gain = ".004" else: cut_gain = "1.0" Loading @@ -197,7 +189,6 @@ def test_sba_enc_system( dtx, max_bw, bypass, agc, sba_order, update_ref, cut_gain=cut_gain, Loading @@ -217,7 +208,6 @@ def test_sba_enc_system( dtx, max_bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -242,7 +232,6 @@ def test_spar_hoa2_enc_system( ): fs = '48' dtx = '0' agc = -1 tag = tag + fs + 'c' max_bw = "FB" Loading @@ -264,7 +253,6 @@ def test_spar_hoa2_enc_system( dtx, max_bw, bypass, agc, sba_order, update_ref, ) Loading @@ -281,7 +269,6 @@ def test_spar_hoa2_enc_system( dtx, max_bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -306,8 +293,6 @@ def test_spar_hoa3_enc_system( ): fs = '48' dtx = '0' agc = -1 tag = tag + fs + 'c' max_bw = "FB" bypass = -1 Loading @@ -328,7 +313,6 @@ def test_spar_hoa3_enc_system( dtx, max_bw, bypass, agc, sba_order, update_ref, ) Loading @@ -345,7 +329,6 @@ def test_spar_hoa3_enc_system( dtx, max_bw, bypass, agc, output_config, update_ref, keep_files, Loading Loading @@ -381,7 +364,6 @@ def test_sba_enc_BWforce_system( bw = sample_rate_bw_idx[1] tag = tag + fs + 'c' bypass = -1 agc = -1 sba_order = "+1" output_config = "FOA" Loading @@ -399,7 +381,6 @@ def test_sba_enc_BWforce_system( dtx, bw, bypass, agc, sba_order, update_ref, cut_testv=True Loading @@ -417,7 +398,6 @@ def test_sba_enc_BWforce_system( dtx, bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -439,7 +419,6 @@ def sba_enc( dtx, ivas_max_bw, bypass, agc, sba_order, update_ref, cut_gain='1.0', Loading @@ -466,20 +445,16 @@ def sba_enc( if ivas_br == 'sw_24k4_256k.bin': ivas_br = f"{br_switch_file_path}/sw_24k4_256k.bin" short_tag_ext = "" if agc != -1: short_tag_ext += f'_AGC{agc}' # we update only bypass = 0/2 (bypass 1 is the same as the baseline) if bypass in [0, 2]: short_tag_ext += f"_pca{bypass}" # to avoid conflicting names in case of parallel test execution, differentiate all cases long_tag_ext = f"_AGC{agc}" if agc != -1 else "_AGC-unspecified" long_tag_ext += f"_pca{bypass}" long_tag_ext = f"_pca{bypass}" dut_pkt_file = f"{dut_out_dir}/{tag_out}{long_tag_ext}.pkt" ref_pkt_file = f"{ref_out_dir}/{tag_out}{short_tag_ext}.pkt" ref_pkt_file_dutenc = f"{ref_out_dir}/{tag_out}{short_tag_ext}_dutenc.pkt" input_path = f"{test_vector_path}/{tag_in}{in_extension}" agc_op = agc if agc != -1 else None bypass_mode = bypass if bypass >= 0 else None dtx_mode = dtx == '1' Loading Loading @@ -507,7 +482,6 @@ def sba_enc( ref_pkt_file, sba_order=sba_order, max_band=ivas_max_bw, agc_op=agc_op, bypass_mode=bypass_mode, dtx_mode=dtx_mode, ) Loading @@ -520,7 +494,6 @@ def sba_enc( ref_pkt_file_dutenc, sba_order=sba_order, max_band=ivas_max_bw, agc_op=agc_op, bypass_mode=bypass_mode, dtx_mode=dtx_mode, ) Loading @@ -534,7 +507,6 @@ def sba_enc( dut_pkt_file, sba_order=sba_order, max_band=ivas_max_bw, agc_op=agc_op, bypass_mode=bypass_mode, dtx_mode=dtx_mode, ) Loading @@ -551,7 +523,6 @@ def sba_dec( dtx, ivas_max_bw, bypass, agc, output_config, update_ref, keep_files, Loading @@ -566,15 +537,12 @@ def sba_dec( tag_out = f"{tag}_ivasbr{ivas_br[:-3]}k_DTX{dtx}" short_tag_ext = "" if agc != -1: short_tag_ext += f'_AGC{agc}' # we update only bypass = 0/2 (bypass 1 is the same as the baseline) if bypass in [0, 2]: short_tag_ext += f"_pca{bypass}" # to avoid conflicting names in case of parallel test execution, differentiate all cases long_tag_ext = f"_AGC{agc}" if agc != -1 else "_AGC-unspecified" long_tag_ext += f"_pca{bypass}" long_tag_ext = f"_pca{bypass}" dut_out_dir = f"{dut_base_path}/sba_bs/raw" ref_out_dir = f"{reference_path}/sba_bs/raw" Loading