Loading lib_dec/ivas_sba_dec.c +1 −1 Original line number Diff line number Diff line Loading @@ -127,7 +127,7 @@ ivas_error ivas_sba_dec_reconfigure( else { #ifdef SBA_BR_SWITCHING_CLEAN_UP int16_t sba_order_internal, nchan_internal; int16_t sba_order_internal; #else int16_t i, sba_order_internal, nchan_internal; DIRAC_DEC_HANDLE hDirAC = st_ivas->hDirAC; Loading lib_enc/ivas_spar_encoder.c +6 −2 Original line number Diff line number Diff line Loading @@ -220,11 +220,15 @@ ivas_error ivas_spar_enc_open( if ( ( error = init_encoder( hSpar->hCoreCoderVAD, 0, hEncoderConfig->var_SID_rate_flag, hEncoderConfig->interval_SID, 1 ) ) != IVAS_ERR_OK ) #endif { hSpar->hCoreCoderVAD = NULL; hSpar->hFrontVad = NULL; return error; } } else { hSpar->hCoreCoderVAD = NULL; hSpar->hFrontVad = NULL; } #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif Loading Loading
lib_dec/ivas_sba_dec.c +1 −1 Original line number Diff line number Diff line Loading @@ -127,7 +127,7 @@ ivas_error ivas_sba_dec_reconfigure( else { #ifdef SBA_BR_SWITCHING_CLEAN_UP int16_t sba_order_internal, nchan_internal; int16_t sba_order_internal; #else int16_t i, sba_order_internal, nchan_internal; DIRAC_DEC_HANDLE hDirAC = st_ivas->hDirAC; Loading
lib_enc/ivas_spar_encoder.c +6 −2 Original line number Diff line number Diff line Loading @@ -220,11 +220,15 @@ ivas_error ivas_spar_enc_open( if ( ( error = init_encoder( hSpar->hCoreCoderVAD, 0, hEncoderConfig->var_SID_rate_flag, hEncoderConfig->interval_SID, 1 ) ) != IVAS_ERR_OK ) #endif { hSpar->hCoreCoderVAD = NULL; hSpar->hFrontVad = NULL; return error; } } else { hSpar->hCoreCoderVAD = NULL; hSpar->hFrontVad = NULL; } #ifdef SBA_BR_SWITCHING_CLEAN_UP } #endif Loading