Loading lib_com/ivas_prot.h +3 −0 Original line number Diff line number Diff line Loading @@ -4017,6 +4017,9 @@ void ivas_spar_get_parameters( ivas_error ivas_spar_md_dec_init( ivas_spar_md_dec_state_t *hMdDec, /* i/o: SPAR MD decoder handle */ const DECODER_CONFIG_HANDLE hDecoderConfig, /* i : configuration structure */ #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) const int16_t sba_order, /* i : SBA order */ #endif const int16_t nchan /* i : number of internal channels */ ); Loading lib_debug/mem_count.c +1 −1 Original line number Diff line number Diff line Loading @@ -94,7 +94,7 @@ typedef INT64 int64_t; /* This is the maximum number of allocations for which to keep information. It can be increased if required. */ #ifdef SBA_BITRATE_SWITCHING #define MAX_INFO_RECORDS 4000 #define MAX_INFO_RECORDS 6000 #else #define MAX_INFO_RECORDS 3000 #endif Loading lib_dec/ivas_sba_dec.c +46 −21 Original line number Diff line number Diff line Loading @@ -37,7 +37,7 @@ #include "ivas_cnst.h" #include "prot.h" #include "ivas_prot.h" #if 1 #ifdef SBA_BITRATE_SWITCHING #include "ivas_rom_com.h" #endif #include "ivas_rom_dec.h" Loading Loading @@ -427,11 +427,13 @@ ivas_error ivas_sba_dec_reconfigure( else { int16_t sba_order_internal, nchan_internal; DIRAC_DEC_HANDLE hDirAC = st_ivas->hDirAC; SPAR_DEC_HANDLE hSpar = st_ivas->hSpar; sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER ); nchan_internal = ivas_sba_get_nchan_metadata( sba_order_internal ); if ( st_ivas->hSpar != NULL && nchan_transport_old != ivas_get_sba_num_TCs( ivas_total_brate, sba_order_internal ) ) if ( hSpar != NULL && nchan_transport_old != ivas_get_sba_num_TCs( ivas_total_brate, sba_order_internal ) ) { // VE: dirty patch -> reconfiguration of SPAR modules should be used instead !! Loading @@ -439,9 +441,9 @@ ivas_error ivas_sba_dec_reconfigure( int16_t active_w_mixing; /* MD handle */ ivas_spar_md_dec_close( &st_ivas->hSpar->hMdDec ); ivas_spar_md_dec_close( &hSpar->hMdDec ); if ( ( error = ivas_spar_md_dec_open( &st_ivas->hSpar->hMdDec, st_ivas->hDecoderConfig, nchan_internal if ( ( error = ivas_spar_md_dec_open( &hSpar->hMdDec, st_ivas->hDecoderConfig, nchan_internal #ifdef SBA_HOA_HBR_IMPROV , sba_order_internal Loading @@ -450,20 +452,19 @@ ivas_error ivas_sba_dec_reconfigure( { return error; } st_ivas->hSpar->hMdDec->td_decorr_flag = 1; st_ivas->hSpar->hMdDec->table_idx = -1; hSpar->hMdDec->td_decorr_flag = 1; hSpar->hMdDec->table_idx = -1; /* TD decorr. */ ivas_spar_td_decorr_dec_close( &st_ivas->hSpar->hTdDecorr ); ivas_spar_td_decorr_dec_close( &hSpar->hTdDecorr ); if ( ( error = ivas_spar_td_decorr_dec_open( &st_ivas->hSpar->hTdDecorr, hDecoderConfig->output_Fs, nchan_internal, 1 ) ) != IVAS_ERR_OK ) if ( ( error = ivas_spar_td_decorr_dec_open( &hSpar->hTdDecorr, hDecoderConfig->output_Fs, nchan_internal, 1 ) ) != IVAS_ERR_OK ) { return error; } /* FB mixer handle */ ivas_FB_mixer_close( &st_ivas->hSpar->hFbMixer, hDecoderConfig->output_Fs ); ivas_FB_mixer_close( &hSpar->hFbMixer, hDecoderConfig->output_Fs ); /* set FB config. */ active_w_mixing = -1; Loading @@ -472,10 +473,10 @@ ivas_error ivas_sba_dec_reconfigure( return error; } fb_cfg->pcm_offset = NS2SA( hDecoderConfig->output_Fs, DELAY_FB_1_NS + IVAS_ENC_DELAY_NS + IVAS_DEC_DELAY_NS ); fb_cfg->remix_order = remix_order_set[st_ivas->hSpar->hMdDec->spar_md_cfg.remix_unmix_order]; fb_cfg->remix_order = remix_order_set[hSpar->hMdDec->spar_md_cfg.remix_unmix_order]; /* FB mixer handle */ if ( ( error = ivas_FB_mixer_open( &st_ivas->hSpar->hFbMixer, hDecoderConfig->output_Fs, fb_cfg ) ) != IVAS_ERR_OK ) if ( ( error = ivas_FB_mixer_open( &hSpar->hFbMixer, hDecoderConfig->output_Fs, fb_cfg ) ) != IVAS_ERR_OK ) { return error; } Loading @@ -487,44 +488,68 @@ ivas_error ivas_sba_dec_reconfigure( { for ( int16_t b = 0; b < IVAS_MAX_NUM_BANDS; b++ ) { st_ivas->hSpar->hMdDec->mixer_mat[i][j][b] = 0.0f; hSpar->hMdDec->mixer_mat[i][j][b] = 0.0f; for ( int16_t i_ts = 0; i_ts < ( MAX_PARAM_SPATIAL_SUBFRAMES + 1 ); i_ts++ ) { st_ivas->hSpar->hMdDec->mixer_mat_prev[i_ts][i][j][b] = 0.0f; hSpar->hMdDec->mixer_mat_prev[i_ts][i][j][b] = 0.0f; } } } } hSpar->i_subframe = 0; } /* PCA handle */ if ( hSpar != NULL ) { if ( st_ivas->hDecoderConfig->ivas_total_brate == PCA_BRATE && sba_order_internal == 1 ) { if ( ( hSpar->hPCA = (PCA_DEC_STATE *) count_malloc( sizeof( PCA_DEC_STATE ) ) ) == NULL ) { return IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for PCA decoder" ); } ivas_pca_dec_init( hSpar->hPCA ); } else if ( hSpar->hPCA != NULL ) { count_free( st_ivas->hSpar->hPCA ); hSpar->hPCA = NULL; } st_ivas->hSpar->i_subframe = 0; } if ( st_ivas->hSpar == NULL && st_ivas->sba_mode == SBA_MODE_SPAR ) if ( hSpar == NULL && st_ivas->sba_mode == SBA_MODE_SPAR ) { if ( ( error = ivas_spar_dec_open( st_ivas ) ) != IVAS_ERR_OK ) { return error; } hSpar = st_ivas->hSpar; } st_ivas->sba_dirac_stereo_flag = 0; sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER ); ivas_spar_config( ivas_total_brate, sba_order_internal, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &st_ivas->hSpar->core_nominal_brate, st_ivas->sid_format ); ivas_spar_config( ivas_total_brate, sba_order_internal, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &hSpar->core_nominal_brate, st_ivas->sid_format ); if ( st_ivas->hDirAC == NULL && st_ivas->sba_mode == SBA_MODE_DIRAC ) if ( hDirAC == NULL && st_ivas->sba_mode == SBA_MODE_DIRAC ) { if ( ( error = ivas_dirac_dec_open( st_ivas ) ) != IVAS_ERR_OK ) { return error; } hDirAC = st_ivas->hDirAC; } if ( st_ivas->hDirAC != NULL ) if ( hDirAC != NULL ) { ivas_dirac_dec_config( st_ivas, DIRAC_RECONFIGURE_MODE ); mvs2s( st_ivas->hDirAC->dirac_to_spar_md_bands, st_ivas->hSpar->dirac_to_spar_md_bands, DIRAC_MAX_NBANDS ); st_ivas->hSpar->enc_param_start_band = st_ivas->hDirAC->hConfig->enc_param_start_band; mvs2s( hDirAC->dirac_to_spar_md_bands, hSpar->dirac_to_spar_md_bands, DIRAC_MAX_NBANDS ); hSpar->enc_param_start_band = hDirAC->hConfig->enc_param_start_band; } if ( ( error = ivas_dirac_sba_config( st_ivas->hQMetaData, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &st_ivas->element_mode_init, ivas_total_brate, st_ivas->sba_analysis_order, st_ivas->sba_mode, IVAS_MAX_NUM_BANDS - SPAR_DIRAC_SPLIT_START_BAND ) ) != IVAS_ERR_OK ) Loading lib_dec/ivas_spar_decoder.c +4 −0 Original line number Diff line number Diff line Loading @@ -671,7 +671,11 @@ static ivas_error ivas_spar_dec_MD( hSpar->hMdDec->table_idx = table_idx; hSpar->hTdDecorr->ducking_flag = ivas_spar_br_table_consts[table_idx].td_ducking; #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) if ( ( error = ivas_spar_md_dec_init( hSpar->hMdDec, hDecoderConfig, sba_order, nchan ) ) != IVAS_ERR_OK ) #else if ( ( error = ivas_spar_md_dec_init( hSpar->hMdDec, hDecoderConfig, nchan ) ) != IVAS_ERR_OK ) #endif { return error; } Loading lib_dec/ivas_spar_md_dec.c +15 −2 Original line number Diff line number Diff line Loading @@ -271,12 +271,18 @@ ivas_error ivas_spar_md_dec_open( return error; } #ifndef SBA_BITRATE_SWITCHING #ifdef SBA_HOA_HBR_IMPROV hMdDec->spar_hoa_md_flag = ivas_sba_get_spar_hoa_md_flag( sba_order, hDecoderConfig->ivas_total_brate ); #endif #endif hMdDec->table_idx = 0; /* just to initialize state variables*/ #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) if ( ( error = ivas_spar_md_dec_init( hMdDec, hDecoderConfig, sba_order, nchan ) ) != IVAS_ERR_OK ) #else if ( ( error = ivas_spar_md_dec_init( hMdDec, hDecoderConfig, nchan ) ) != IVAS_ERR_OK ) #endif { return error; } Loading Loading @@ -437,6 +443,9 @@ void ivas_spar_md_dec_close( ivas_error ivas_spar_md_dec_init( ivas_spar_md_dec_state_t *hMdDec, /* i/o: SPAR MD decoder handle */ const DECODER_CONFIG_HANDLE hDecoderConfig, /* i : configuration structure */ #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) const int16_t sba_order, /* i : SBA order */ #endif const int16_t nchan /* i : number of internal channels */ ) { Loading @@ -444,6 +453,10 @@ ivas_error ivas_spar_md_dec_init( int16_t nchan_transport; float pFC[IVAS_MAX_NUM_BANDS], PR_minmax[2]; #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) hMdDec->spar_hoa_md_flag = ivas_sba_get_spar_hoa_md_flag( sba_order, hDecoderConfig->ivas_total_brate ); #endif hMdDec->spar_md_cfg.gen_bs = 1; // VE2DB : always 1 - can it be removed? #ifdef SBA_HOA_HBR_IMPROV Loading Loading
lib_com/ivas_prot.h +3 −0 Original line number Diff line number Diff line Loading @@ -4017,6 +4017,9 @@ void ivas_spar_get_parameters( ivas_error ivas_spar_md_dec_init( ivas_spar_md_dec_state_t *hMdDec, /* i/o: SPAR MD decoder handle */ const DECODER_CONFIG_HANDLE hDecoderConfig, /* i : configuration structure */ #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) const int16_t sba_order, /* i : SBA order */ #endif const int16_t nchan /* i : number of internal channels */ ); Loading
lib_debug/mem_count.c +1 −1 Original line number Diff line number Diff line Loading @@ -94,7 +94,7 @@ typedef INT64 int64_t; /* This is the maximum number of allocations for which to keep information. It can be increased if required. */ #ifdef SBA_BITRATE_SWITCHING #define MAX_INFO_RECORDS 4000 #define MAX_INFO_RECORDS 6000 #else #define MAX_INFO_RECORDS 3000 #endif Loading
lib_dec/ivas_sba_dec.c +46 −21 Original line number Diff line number Diff line Loading @@ -37,7 +37,7 @@ #include "ivas_cnst.h" #include "prot.h" #include "ivas_prot.h" #if 1 #ifdef SBA_BITRATE_SWITCHING #include "ivas_rom_com.h" #endif #include "ivas_rom_dec.h" Loading Loading @@ -427,11 +427,13 @@ ivas_error ivas_sba_dec_reconfigure( else { int16_t sba_order_internal, nchan_internal; DIRAC_DEC_HANDLE hDirAC = st_ivas->hDirAC; SPAR_DEC_HANDLE hSpar = st_ivas->hSpar; sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER ); nchan_internal = ivas_sba_get_nchan_metadata( sba_order_internal ); if ( st_ivas->hSpar != NULL && nchan_transport_old != ivas_get_sba_num_TCs( ivas_total_brate, sba_order_internal ) ) if ( hSpar != NULL && nchan_transport_old != ivas_get_sba_num_TCs( ivas_total_brate, sba_order_internal ) ) { // VE: dirty patch -> reconfiguration of SPAR modules should be used instead !! Loading @@ -439,9 +441,9 @@ ivas_error ivas_sba_dec_reconfigure( int16_t active_w_mixing; /* MD handle */ ivas_spar_md_dec_close( &st_ivas->hSpar->hMdDec ); ivas_spar_md_dec_close( &hSpar->hMdDec ); if ( ( error = ivas_spar_md_dec_open( &st_ivas->hSpar->hMdDec, st_ivas->hDecoderConfig, nchan_internal if ( ( error = ivas_spar_md_dec_open( &hSpar->hMdDec, st_ivas->hDecoderConfig, nchan_internal #ifdef SBA_HOA_HBR_IMPROV , sba_order_internal Loading @@ -450,20 +452,19 @@ ivas_error ivas_sba_dec_reconfigure( { return error; } st_ivas->hSpar->hMdDec->td_decorr_flag = 1; st_ivas->hSpar->hMdDec->table_idx = -1; hSpar->hMdDec->td_decorr_flag = 1; hSpar->hMdDec->table_idx = -1; /* TD decorr. */ ivas_spar_td_decorr_dec_close( &st_ivas->hSpar->hTdDecorr ); ivas_spar_td_decorr_dec_close( &hSpar->hTdDecorr ); if ( ( error = ivas_spar_td_decorr_dec_open( &st_ivas->hSpar->hTdDecorr, hDecoderConfig->output_Fs, nchan_internal, 1 ) ) != IVAS_ERR_OK ) if ( ( error = ivas_spar_td_decorr_dec_open( &hSpar->hTdDecorr, hDecoderConfig->output_Fs, nchan_internal, 1 ) ) != IVAS_ERR_OK ) { return error; } /* FB mixer handle */ ivas_FB_mixer_close( &st_ivas->hSpar->hFbMixer, hDecoderConfig->output_Fs ); ivas_FB_mixer_close( &hSpar->hFbMixer, hDecoderConfig->output_Fs ); /* set FB config. */ active_w_mixing = -1; Loading @@ -472,10 +473,10 @@ ivas_error ivas_sba_dec_reconfigure( return error; } fb_cfg->pcm_offset = NS2SA( hDecoderConfig->output_Fs, DELAY_FB_1_NS + IVAS_ENC_DELAY_NS + IVAS_DEC_DELAY_NS ); fb_cfg->remix_order = remix_order_set[st_ivas->hSpar->hMdDec->spar_md_cfg.remix_unmix_order]; fb_cfg->remix_order = remix_order_set[hSpar->hMdDec->spar_md_cfg.remix_unmix_order]; /* FB mixer handle */ if ( ( error = ivas_FB_mixer_open( &st_ivas->hSpar->hFbMixer, hDecoderConfig->output_Fs, fb_cfg ) ) != IVAS_ERR_OK ) if ( ( error = ivas_FB_mixer_open( &hSpar->hFbMixer, hDecoderConfig->output_Fs, fb_cfg ) ) != IVAS_ERR_OK ) { return error; } Loading @@ -487,44 +488,68 @@ ivas_error ivas_sba_dec_reconfigure( { for ( int16_t b = 0; b < IVAS_MAX_NUM_BANDS; b++ ) { st_ivas->hSpar->hMdDec->mixer_mat[i][j][b] = 0.0f; hSpar->hMdDec->mixer_mat[i][j][b] = 0.0f; for ( int16_t i_ts = 0; i_ts < ( MAX_PARAM_SPATIAL_SUBFRAMES + 1 ); i_ts++ ) { st_ivas->hSpar->hMdDec->mixer_mat_prev[i_ts][i][j][b] = 0.0f; hSpar->hMdDec->mixer_mat_prev[i_ts][i][j][b] = 0.0f; } } } } hSpar->i_subframe = 0; } /* PCA handle */ if ( hSpar != NULL ) { if ( st_ivas->hDecoderConfig->ivas_total_brate == PCA_BRATE && sba_order_internal == 1 ) { if ( ( hSpar->hPCA = (PCA_DEC_STATE *) count_malloc( sizeof( PCA_DEC_STATE ) ) ) == NULL ) { return IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for PCA decoder" ); } ivas_pca_dec_init( hSpar->hPCA ); } else if ( hSpar->hPCA != NULL ) { count_free( st_ivas->hSpar->hPCA ); hSpar->hPCA = NULL; } st_ivas->hSpar->i_subframe = 0; } if ( st_ivas->hSpar == NULL && st_ivas->sba_mode == SBA_MODE_SPAR ) if ( hSpar == NULL && st_ivas->sba_mode == SBA_MODE_SPAR ) { if ( ( error = ivas_spar_dec_open( st_ivas ) ) != IVAS_ERR_OK ) { return error; } hSpar = st_ivas->hSpar; } st_ivas->sba_dirac_stereo_flag = 0; sba_order_internal = min( st_ivas->sba_analysis_order, IVAS_MAX_SBA_ORDER ); ivas_spar_config( ivas_total_brate, sba_order_internal, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &st_ivas->hSpar->core_nominal_brate, st_ivas->sid_format ); ivas_spar_config( ivas_total_brate, sba_order_internal, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &hSpar->core_nominal_brate, st_ivas->sid_format ); if ( st_ivas->hDirAC == NULL && st_ivas->sba_mode == SBA_MODE_DIRAC ) if ( hDirAC == NULL && st_ivas->sba_mode == SBA_MODE_DIRAC ) { if ( ( error = ivas_dirac_dec_open( st_ivas ) ) != IVAS_ERR_OK ) { return error; } hDirAC = st_ivas->hDirAC; } if ( st_ivas->hDirAC != NULL ) if ( hDirAC != NULL ) { ivas_dirac_dec_config( st_ivas, DIRAC_RECONFIGURE_MODE ); mvs2s( st_ivas->hDirAC->dirac_to_spar_md_bands, st_ivas->hSpar->dirac_to_spar_md_bands, DIRAC_MAX_NBANDS ); st_ivas->hSpar->enc_param_start_band = st_ivas->hDirAC->hConfig->enc_param_start_band; mvs2s( hDirAC->dirac_to_spar_md_bands, hSpar->dirac_to_spar_md_bands, DIRAC_MAX_NBANDS ); hSpar->enc_param_start_band = hDirAC->hConfig->enc_param_start_band; } if ( ( error = ivas_dirac_sba_config( st_ivas->hQMetaData, &st_ivas->nchan_transport, &st_ivas->nSCE, &st_ivas->nCPE, &st_ivas->element_mode_init, ivas_total_brate, st_ivas->sba_analysis_order, st_ivas->sba_mode, IVAS_MAX_NUM_BANDS - SPAR_DIRAC_SPLIT_START_BAND ) ) != IVAS_ERR_OK ) Loading
lib_dec/ivas_spar_decoder.c +4 −0 Original line number Diff line number Diff line Loading @@ -671,7 +671,11 @@ static ivas_error ivas_spar_dec_MD( hSpar->hMdDec->table_idx = table_idx; hSpar->hTdDecorr->ducking_flag = ivas_spar_br_table_consts[table_idx].td_ducking; #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) if ( ( error = ivas_spar_md_dec_init( hSpar->hMdDec, hDecoderConfig, sba_order, nchan ) ) != IVAS_ERR_OK ) #else if ( ( error = ivas_spar_md_dec_init( hSpar->hMdDec, hDecoderConfig, nchan ) ) != IVAS_ERR_OK ) #endif { return error; } Loading
lib_dec/ivas_spar_md_dec.c +15 −2 Original line number Diff line number Diff line Loading @@ -271,12 +271,18 @@ ivas_error ivas_spar_md_dec_open( return error; } #ifndef SBA_BITRATE_SWITCHING #ifdef SBA_HOA_HBR_IMPROV hMdDec->spar_hoa_md_flag = ivas_sba_get_spar_hoa_md_flag( sba_order, hDecoderConfig->ivas_total_brate ); #endif #endif hMdDec->table_idx = 0; /* just to initialize state variables*/ #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) if ( ( error = ivas_spar_md_dec_init( hMdDec, hDecoderConfig, sba_order, nchan ) ) != IVAS_ERR_OK ) #else if ( ( error = ivas_spar_md_dec_init( hMdDec, hDecoderConfig, nchan ) ) != IVAS_ERR_OK ) #endif { return error; } Loading Loading @@ -437,6 +443,9 @@ void ivas_spar_md_dec_close( ivas_error ivas_spar_md_dec_init( ivas_spar_md_dec_state_t *hMdDec, /* i/o: SPAR MD decoder handle */ const DECODER_CONFIG_HANDLE hDecoderConfig, /* i : configuration structure */ #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) const int16_t sba_order, /* i : SBA order */ #endif const int16_t nchan /* i : number of internal channels */ ) { Loading @@ -444,6 +453,10 @@ ivas_error ivas_spar_md_dec_init( int16_t nchan_transport; float pFC[IVAS_MAX_NUM_BANDS], PR_minmax[2]; #if ( defined SBA_BITRATE_SWITCHING && defined SBA_HOA_HBR_IMPROV ) hMdDec->spar_hoa_md_flag = ivas_sba_get_spar_hoa_md_flag( sba_order, hDecoderConfig->ivas_total_brate ); #endif hMdDec->spar_md_cfg.gen_bs = 1; // VE2DB : always 1 - can it be removed? #ifdef SBA_HOA_HBR_IMPROV Loading