Loading lib_com/ivas_filters.c +7 −7 Original line number Diff line number Diff line Loading @@ -42,7 +42,7 @@ /*------------------------------------------------------------------------------------------* * Static functions declaration * Local functions declaration *------------------------------------------------------------------------------------------*/ static void ivas_iir_2_filter( ivas_filters_process_state_t *filter_state, float *pIn_Out, const int16_t length, const int16_t stage ); Loading @@ -55,9 +55,9 @@ static void ivas_iir_2_filter( ivas_filters_process_state_t *filter_state, float *-----------------------------------------------------------------------------------------*/ void ivas_filters_init( ivas_filters_process_state_t *filter_state, const float *filt_coeff, const int16_t order ) ivas_filters_process_state_t *filter_state, /* i/o: filter state handle */ const float *filt_coeff, /* i : filter coefficients */ const int16_t order ) /* i : filter order */ { int16_t i; filter_state->order = order; Loading Loading @@ -107,9 +107,9 @@ void ivas_filters_init( *-----------------------------------------------------------------------------------------*/ void ivas_filter_process( ivas_filters_process_state_t *filter_state, float *pIn_Out, const int16_t length ) ivas_filters_process_state_t *filter_state, /* i/o: filter state handle */ float *pIn_Out, /* i/o: signal subject to filtering */ const int16_t length ) /* i : filter order */ { switch ( filter_state->order ) Loading lib_com/ivas_prot.h +37 −37 Original line number Diff line number Diff line Loading @@ -3170,7 +3170,7 @@ void ivas_dirac_enc( BSTR_ENC_HANDLE hMetaData, /* i/o: Metadata bitstream handle */ int16_t *nb_bits_metadata, /* o : number of metadata bits written */ const int16_t Opt_DTX_ON, /* i : flag signaling DTX on */ float data_f[][L_FRAME48k], /* i/o: input: ACN/SN3D, output: omni, stereo DMX or FOA */ float data_f[][L_FRAME48k], /* i : SBA channels */ const int16_t input_frame, /* i : input frame length */ const int16_t sba_planar /* i : SBA planar flag */ ); Loading Loading @@ -3988,7 +3988,7 @@ ivas_error ivas_spar_md_dec_open( const int16_t num_channels /* i : number of internal channels */ #ifdef SBA_HOA_HBR_IMPROV , const int16_t sba_order /* i : flag to send HOA MD for all bands */ const int16_t sba_order /* i : SBA order */ #endif ); Loading Loading @@ -4926,15 +4926,15 @@ void ivas_lfe_lpf_select_filt_coeff( ); void ivas_filters_init( ivas_filters_process_state_t *filter_state, const float *filt_coeff, const int16_t order ivas_filters_process_state_t *filter_state, /* i/o: filter state handle */ const float *filt_coeff, /* i : filter coefficients */ const int16_t order /* i : filter order */ ); void ivas_filter_process( ivas_filters_process_state_t *filter_state, float *pIn_Out, const int16_t length ivas_filters_process_state_t *filter_state, /* i/o: filter state handle */ float *pIn_Out, /* i : signal subject to filtering */ const int16_t length /* i : filter order */ ); Loading Loading @@ -5193,7 +5193,7 @@ void ivas_fb_mixer_pcm_ingest( void ivas_dirac_enc_spar_delay_synchro( Encoder_Struct *st_ivas, /* i/o: IVAS encoder structure */ const int16_t input_frame, /* i : input frame length */ float data_f[][L_FRAME48k] /* i/o: input: ACN/SN3D, output: omni, stereo DMX or FOA*/ float data_f[][L_FRAME48k] /* i/o: SBA channels (ACN / SN3D) */ ); void ivas_fb_mixer_update_prior_input( Loading lib_enc/ivas_dirac_enc.c +20 −19 Original line number Diff line number Diff line Loading @@ -306,7 +306,7 @@ void ivas_dirac_enc( BSTR_ENC_HANDLE hMetaData, /* i/o: Metadata bitstream handle */ int16_t *nb_bits_metadata, /* o : number of metadata bits written */ const int16_t Opt_DTX_ON, /* i : flag signaling DTX on */ float data_f[][L_FRAME48k], /* i/o: input: ACN/SN3D, output: omni, stereo DMX or FOA*/ float data_f[][L_FRAME48k], /* i : SBA channels */ const int16_t input_frame, /* i : input frame length */ const int16_t sba_planar /* i : SBA planar flag */ ) Loading Loading @@ -444,35 +444,35 @@ void ivas_dirac_enc( /*------------------------------------------------------------------------- * computeReferencePower_enc() * * ivas_dirac_enc_spar_delay_synchro() * * Delay input channels to be synchronized between DirAC and SPAR *-------------------------------------------------------------------------*/ void ivas_dirac_enc_spar_delay_synchro( Encoder_Struct *st_ivas, /* i/o: IVAS encoder structure */ const int16_t input_frame, /* i : input frame length */ float data_f[][L_FRAME48k] /* i/o: input: ACN/SN3D, output: omni, stereo DMX or FOA*/ float data_f[][L_FRAME48k] /* i/o: SBA channels (ACN / SN3D) */ ) { int16_t ch_idx; float tmp_buffer[L_FRAME48k]; #ifdef CORECODER_BITRATE_SWITCHING Encoder_State *sts[MCT_MAX_BLOCKS]; int16_t sce_id, cpe_id, i_chan; /* check last sba_mode */ if ( ivas_sba_mode_select( st_ivas->hEncoderConfig->last_ivas_total_brate ) == SBA_MODE_SPAR ) { Encoder_State *sts[MCT_MAX_BLOCKS]; int16_t i_chan = 0; /* initializations */ for ( int16_t sce_id = 0; sce_id < st_ivas->nSCE; sce_id++ ) i_chan = 0; for ( sce_id = 0; sce_id < st_ivas->nSCE; sce_id++ ) { sts[sce_id] = st_ivas->hSCE[sce_id]->hCoreCoder[0]; i_chan++; } for ( int16_t cpe_id = 0; cpe_id < st_ivas->nCPE; cpe_id++ ) for ( cpe_id = 0; cpe_id < st_ivas->nCPE; cpe_id++ ) { for ( int16_t ch = 0; ch < CPE_CHANNELS; ch++ ) { Loading @@ -481,6 +481,7 @@ void ivas_dirac_enc_spar_delay_synchro( } } /* populate old synchro buffers */ for ( ch_idx = 0; ch_idx < i_chan; ch_idx++ ) { mvr2r( sts[ch_idx]->input, st_ivas->hDirAC->sba_synchro_buffer[ch_idx], st_ivas->hDirAC->num_samples_synchro_delay ); Loading Loading
lib_com/ivas_filters.c +7 −7 Original line number Diff line number Diff line Loading @@ -42,7 +42,7 @@ /*------------------------------------------------------------------------------------------* * Static functions declaration * Local functions declaration *------------------------------------------------------------------------------------------*/ static void ivas_iir_2_filter( ivas_filters_process_state_t *filter_state, float *pIn_Out, const int16_t length, const int16_t stage ); Loading @@ -55,9 +55,9 @@ static void ivas_iir_2_filter( ivas_filters_process_state_t *filter_state, float *-----------------------------------------------------------------------------------------*/ void ivas_filters_init( ivas_filters_process_state_t *filter_state, const float *filt_coeff, const int16_t order ) ivas_filters_process_state_t *filter_state, /* i/o: filter state handle */ const float *filt_coeff, /* i : filter coefficients */ const int16_t order ) /* i : filter order */ { int16_t i; filter_state->order = order; Loading Loading @@ -107,9 +107,9 @@ void ivas_filters_init( *-----------------------------------------------------------------------------------------*/ void ivas_filter_process( ivas_filters_process_state_t *filter_state, float *pIn_Out, const int16_t length ) ivas_filters_process_state_t *filter_state, /* i/o: filter state handle */ float *pIn_Out, /* i/o: signal subject to filtering */ const int16_t length ) /* i : filter order */ { switch ( filter_state->order ) Loading
lib_com/ivas_prot.h +37 −37 Original line number Diff line number Diff line Loading @@ -3170,7 +3170,7 @@ void ivas_dirac_enc( BSTR_ENC_HANDLE hMetaData, /* i/o: Metadata bitstream handle */ int16_t *nb_bits_metadata, /* o : number of metadata bits written */ const int16_t Opt_DTX_ON, /* i : flag signaling DTX on */ float data_f[][L_FRAME48k], /* i/o: input: ACN/SN3D, output: omni, stereo DMX or FOA */ float data_f[][L_FRAME48k], /* i : SBA channels */ const int16_t input_frame, /* i : input frame length */ const int16_t sba_planar /* i : SBA planar flag */ ); Loading Loading @@ -3988,7 +3988,7 @@ ivas_error ivas_spar_md_dec_open( const int16_t num_channels /* i : number of internal channels */ #ifdef SBA_HOA_HBR_IMPROV , const int16_t sba_order /* i : flag to send HOA MD for all bands */ const int16_t sba_order /* i : SBA order */ #endif ); Loading Loading @@ -4926,15 +4926,15 @@ void ivas_lfe_lpf_select_filt_coeff( ); void ivas_filters_init( ivas_filters_process_state_t *filter_state, const float *filt_coeff, const int16_t order ivas_filters_process_state_t *filter_state, /* i/o: filter state handle */ const float *filt_coeff, /* i : filter coefficients */ const int16_t order /* i : filter order */ ); void ivas_filter_process( ivas_filters_process_state_t *filter_state, float *pIn_Out, const int16_t length ivas_filters_process_state_t *filter_state, /* i/o: filter state handle */ float *pIn_Out, /* i : signal subject to filtering */ const int16_t length /* i : filter order */ ); Loading Loading @@ -5193,7 +5193,7 @@ void ivas_fb_mixer_pcm_ingest( void ivas_dirac_enc_spar_delay_synchro( Encoder_Struct *st_ivas, /* i/o: IVAS encoder structure */ const int16_t input_frame, /* i : input frame length */ float data_f[][L_FRAME48k] /* i/o: input: ACN/SN3D, output: omni, stereo DMX or FOA*/ float data_f[][L_FRAME48k] /* i/o: SBA channels (ACN / SN3D) */ ); void ivas_fb_mixer_update_prior_input( Loading
lib_enc/ivas_dirac_enc.c +20 −19 Original line number Diff line number Diff line Loading @@ -306,7 +306,7 @@ void ivas_dirac_enc( BSTR_ENC_HANDLE hMetaData, /* i/o: Metadata bitstream handle */ int16_t *nb_bits_metadata, /* o : number of metadata bits written */ const int16_t Opt_DTX_ON, /* i : flag signaling DTX on */ float data_f[][L_FRAME48k], /* i/o: input: ACN/SN3D, output: omni, stereo DMX or FOA*/ float data_f[][L_FRAME48k], /* i : SBA channels */ const int16_t input_frame, /* i : input frame length */ const int16_t sba_planar /* i : SBA planar flag */ ) Loading Loading @@ -444,35 +444,35 @@ void ivas_dirac_enc( /*------------------------------------------------------------------------- * computeReferencePower_enc() * * ivas_dirac_enc_spar_delay_synchro() * * Delay input channels to be synchronized between DirAC and SPAR *-------------------------------------------------------------------------*/ void ivas_dirac_enc_spar_delay_synchro( Encoder_Struct *st_ivas, /* i/o: IVAS encoder structure */ const int16_t input_frame, /* i : input frame length */ float data_f[][L_FRAME48k] /* i/o: input: ACN/SN3D, output: omni, stereo DMX or FOA*/ float data_f[][L_FRAME48k] /* i/o: SBA channels (ACN / SN3D) */ ) { int16_t ch_idx; float tmp_buffer[L_FRAME48k]; #ifdef CORECODER_BITRATE_SWITCHING Encoder_State *sts[MCT_MAX_BLOCKS]; int16_t sce_id, cpe_id, i_chan; /* check last sba_mode */ if ( ivas_sba_mode_select( st_ivas->hEncoderConfig->last_ivas_total_brate ) == SBA_MODE_SPAR ) { Encoder_State *sts[MCT_MAX_BLOCKS]; int16_t i_chan = 0; /* initializations */ for ( int16_t sce_id = 0; sce_id < st_ivas->nSCE; sce_id++ ) i_chan = 0; for ( sce_id = 0; sce_id < st_ivas->nSCE; sce_id++ ) { sts[sce_id] = st_ivas->hSCE[sce_id]->hCoreCoder[0]; i_chan++; } for ( int16_t cpe_id = 0; cpe_id < st_ivas->nCPE; cpe_id++ ) for ( cpe_id = 0; cpe_id < st_ivas->nCPE; cpe_id++ ) { for ( int16_t ch = 0; ch < CPE_CHANNELS; ch++ ) { Loading @@ -481,6 +481,7 @@ void ivas_dirac_enc_spar_delay_synchro( } } /* populate old synchro buffers */ for ( ch_idx = 0; ch_idx < i_chan; ch_idx++ ) { mvr2r( sts[ch_idx]->input, st_ivas->hDirAC->sba_synchro_buffer[ch_idx], st_ivas->hDirAC->num_samples_synchro_delay ); Loading