Commit af23746e authored by Jan Kiene's avatar Jan Kiene
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Merge branch...

Merge branch '28-wrong-decoding-of-framing-in-tcx10-frames-after-lost-frames-possible-180' into 'main'

[non-BE] Resolve "Wrong decoding of framing in TCX10 frames after lost frames possible (180)"

See merge request !16
parents a0bc3aa9 d1208061
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+1 −1
Original line number Diff line number Diff line
@@ -144,7 +144,7 @@

/*#define FIX_I4_OL_PITCH*/                             /* fix open-loop pitch used for EVS core switching */
/*#define FIX_IVAS_185_MDCT_ST_PLC_FADEOUT*/            /* IVAS-185 fix bug in TCX-PLC fadeout for MDCT-Stereo and improve fadeout by fading to background noise instead of white noise */
/*#define FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10*/  /* IVAS-180 write last overlap mode in TCX10 frames to allow for correct TCX10/TCX5 subframe decomposition in TCX10 frames after a lost frame */
#define FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10      /* IVAS-180 write last overlap mode in TCX10 frames to allow for correct TCX10/TCX5 subframe decomposition in TCX10 frames after a lost frame */
/*#define FIX_I1_113*/                                  /* under review : MCT bit distribution optimization for SBA high bitrates*/

#define FIX_1_CUSTOM_LS                                   /* fix bug 1-ivas-internal-error-in-decoder-for-custom-loudspeaker-format-with-sba-input-at-24-4kbps */
+4 −22
Original line number Diff line number Diff line
@@ -151,41 +151,23 @@ static void dec_prm_tcx_sidebits(
    if ( ( st->last_core == ACELP_CORE && st->last_total_brate == FRAME_NO_DATA ) || st->prev_bfi )
    {
        /* needed for cases where first TCX frame after a certain transition (e.g. inactive SID/zero frame -> active or stereo switching) is lost */
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
        if ( st->core == TCX_20_CORE )
        {
            st->last_core_from_bs = get_next_indice( st0, 1 );
        }
        else
        {
            st->last_core_from_bs = st->last_core;
        }
#else
        st->last_core_from_bs = get_next_indice( st0, 1 );
#endif

        /* ACELP -> TCX_10 transitions are forbidden */
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10 /* put under this switch for documentation, even though it is actually a general bug */
        if ( st->core == TCX_10_CORE && st->last_core == ACELP_CORE )
#else
        if ( st->core == TCX_10_CORE && st->last_core == ACELP_CORE && st->last_total_brate == FRAME_NO_DATA )
#endif
        {
            st->last_core = TCX_20_CORE;
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
            st->last_core_from_bs = st->last_core;
#endif
        }
    }
    else
    {
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
        if ( st->core != TCX_10_CORE )
    {
        st->last_core = get_next_indice( st0, 1 );
        st->last_core_from_bs = st->last_core;
    }
#else
        st->last_core = get_next_indice( st0, 1 );
        st->last_core_from_bs = st->last_core;
#endif
    }

#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
    getTCXWindowing( st->core, st->last_core, st->element_mode, st->hTcxCfg, st0 );
+0 −11
Original line number Diff line number Diff line
@@ -876,18 +876,7 @@ static void dec_prm_tcx(
    /* last_core for error concealment */
    if ( !st->use_partial_copy && st->element_mode != IVAS_CPE_MDCT )
    {
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
        if ( st->core == TCX_20_CORE )
        {
            st->last_core_from_bs = get_next_indice( st, 1 );
        }
        else
        {
            st->last_core_from_bs = st->last_core;
        }
#else
        st->last_core_from_bs = get_next_indice( st, 1 ); /* Store decoder memory of last_core */
#endif
        if ( st->last_core == ACELP_CORE && st->last_core_from_bs != ACELP_CORE )
        {
            /* A mismatch between the memory and the last_core
+0 −7
Original line number Diff line number Diff line
@@ -87,14 +87,7 @@ static void enc_prm_pre_mdct(
#endif

    /* write last_core for core switching and error concealment */
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
    if ( st->core == TCX_20_CORE )
    {
    push_next_indice( hBstr, st->last_core != ACELP_CORE, 1 );
    }
#else
    push_next_indice( hBstr, st->last_core != ACELP_CORE, 1 );
#endif

#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
    writeTCXWindowing( hBstr, st->hTcxCfg->tcx_curr_overlap_mode );
+0 −14
Original line number Diff line number Diff line
@@ -196,11 +196,7 @@ void stereo_tcx_core_enc(
    st->bits_frame_core = (int16_t) ( st->total_brate / FRAMES_PER_SEC ) - hBstr->nb_bits_tot;

    /*Get Bits of TCX header*/
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
    nbits_header = 2; /* Coder types (2) */
#else
    nbits_header = 3; /* Coder types (2) + last_core for bfi (1) */
#endif

    if ( st->tcxonly )
    {
@@ -261,9 +257,6 @@ void stereo_tcx_core_enc(
    {
        st->core = TCX_20_CORE;
        n_subframes = 1;
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
        nbits_header += 1; /* last core for bfi */
#endif
    }

#ifdef DEBUG_MODE_TCX
@@ -284,14 +277,7 @@ void stereo_tcx_core_enc(
#endif

    /* write last_core for error concealment */
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10
    if ( st->core == TCX_20_CORE )
    {
    push_next_indice( hBstr, ( st->last_core != ACELP_CORE || st->core == TCX_10_CORE ), 1 );
    }
#else
    push_next_indice( hBstr, ( st->last_core != ACELP_CORE || st->core == TCX_10_CORE ), 1 );
#endif

    /* write TCX overlap mode (1 bit: full, 2 bits: half or no overlap) */
#ifdef FIX_IVAS_180_PLC_SIGNAL_LAST_OVLP_IN_TCX10