#define TD5 /* Eri: Contribution 17: Extended metadata for 6 DoF rendering in TD renderer */
#define TD5_FIX_INVALID_MEMORY_ACCESS /* FhG: Resolves segfault in case IVAS_REND_InitConfig gets initialized with rendererConfigEnabled:=false && ISM are being rendered */
#define FIX_371_DELAY_REPORT /* Issue 371: div. by zero with -no_delay_cmp */