Commit b36e9598 authored by norvell's avatar norvell
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Merge branch '102-swb-tbe-target-missing-in-tcx-acelp-switch-dft-stereo' into 'main'

[Non-BE] FIX_I102_SWB_TBE_SWITCH

See merge request !124
parents cc0abbd2 bb137194
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+3 −0
Original line number Diff line number Diff line
@@ -146,6 +146,9 @@
#define FADE_TO_ZERO_FOR_TOO_LONG_FRAMELOSS
/*#define FIX_I1_113*/                                  /* under review : MCT bit distribution optimization for SBA high bitrates*/

#define SPAR_SCALING_HARMONIZATION                      /* Issue 80: Changes to harmonize scaling in spar */
#define FIX_I98_HANDLES_TO_NULL                         /* Issue 98: do the setting of all handles to NULL in one place */
#define FIX_I102_SWB_TBE_SWITCH                         /* Issue 102: avoid IO->SWB switching code for IVAS, generate SHB ACB mem with lerp in case of switch */
#define FIX_I106_TDREND_5MS                             /* Issue 106: 5 ms update rate in TD object renderer */
#define ALIGN_SID_SIZE                                  /* Issue 111: make all DTX modes use one SID frame bitrate (5.2 kbps) */
#define FIX_135_MDCT_STEREO_MODE_UNINITIALIZED          /* Issue 135: fix uninitialized value usage in SBA MDCT-Stereo core with PLC */
+8 −1
Original line number Diff line number Diff line
@@ -705,7 +705,14 @@ ivas_error acelp_core_dec(
                mvr2r( old_exc_s + st->L_frame - M, st->mem_syn2, M );
                residu( Aq, M, old_exc_s, old_exc + L_EXC_MEM_DEC - st->L_frame, st->L_frame );
            }
#ifdef FIX_I102_SWB_TBE_SWITCH
            if ( st->last_core != ACELP_CORE && st->element_mode > EVS_MONO )
            {
                /* Prepare ACB memory of old_bwe_exc */
                lerp( old_exc, old_bwe_exc, L_EXC_MEM_DEC * HIBND_ACB_L_FAC, L_EXC_MEM_DEC );
                
            }
#endif
            /*-----------------------------------------------------------------*
             * FEC - first good frame after lost frame(s) (possibility to correct the ACB)
             *-----------------------------------------------------------------*/
+7 −0
Original line number Diff line number Diff line
@@ -472,6 +472,13 @@ ivas_error acelp_core_enc(
            mvr2r( hLPDmem->old_exc + st->L_frame - M, hLPDmem->mem_syn, M );
            residu( Aq, M, hLPDmem->old_exc, old_exc, st->L_frame );
        }
#ifdef FIX_I102_SWB_TBE_SWITCH
        if ( st->last_core != ACELP_CORE && st->element_mode > EVS_MONO )
        {
            /* Prepare ACB memory of old_bwe_exc */
            lerp( old_exc, old_bwe_exc, L_EXC_MEM_DEC * HIBND_ACB_L_FAC, L_EXC_MEM_DEC );
        }
#endif

        /*---------------------------------------------------------------*
         * Calculation of LP residual (filtering through A[z] filter)
+59 −2
Original line number Diff line number Diff line
@@ -288,6 +288,10 @@ void swb_pre_proc(
    int32_t inner_Fs, input_Fs;
    float old_input[NS2SA( 48000, DELAY_FD_BWE_ENC_NS + DELAY_FIR_RESAMPL_NS ) + L_FRAME48k];
    float spchTmp[640];
#ifdef FIX_I102_SWB_TBE_SWITCH
    float spchTmp2[640];
    int16_t L_resamp;
#endif
    int16_t i, j;
    int16_t startB, endB;
    float *realBufferFlipped[CLDFB_NO_COL_MAX];
@@ -677,7 +681,11 @@ void swb_pre_proc(
    }
    else
    {
#ifdef FIX_I102_SWB_TBE_SWITCH
        if ( ( st->bwidth == FB || st->core == ACELP_CORE ) && ( st->element_mode == EVS_MONO ) )
#else
        if ( st->bwidth == FB || st->core == ACELP_CORE || ( st->element_mode == IVAS_CPE_DFT && input_Fs == 48000 ) )
#endif
        {
            set_f( hBWE_TD->old_speech_shb, 0, L_LOOK_16k + L_SUBFR16k );
            set_f( shb_speech, 0, L_FRAME16k ); /* shb_speech for FB/SWB BWE_HIGHRATE is not used at 64kbps */
@@ -689,23 +697,62 @@ void swb_pre_proc(
            st->hBWE_TD->prev_pow_exc16kWhtnd = 1.0f;
            st->hBWE_TD->prev_mix_factor = 1.0f;
            st->hBWE_TD->prev_Env_error = 0.0f;

#ifndef FIX_I102_SWB_TBE_SWITCH
            if ( st->element_mode == IVAS_CPE_DFT )
            {
                set_f( hCPE->hStereoDft->output_mem_dmx_16k_shb, 0, STEREO_DFT_OVL_16k );
            }
#endif
        }
        else
        {
            /* flip the spectrm */
#ifdef FIX_I102_SWB_TBE_SWITCH
            if ( st->element_mode == IVAS_CPE_DFT )
            {
                if ( st->L_frame == L_FRAME )
                {
                    L_resamp = 560; /* 6.4 kHz core -> 6 - 14 kHz SHB target. 20 ms is 560 samples in 28 kHz sample rate */
                }
                else
                {
                    L_resamp = 620; /* 8 kHz core -> 7.5 - 15.5 kHz SHB target. 20 ms is 620 samples in 31 kHz sample rate */
                }

                /* Dirty downsampling to match Nyquist to upper frequency limit of target */
                lerp( st->input, new_swb_speech, L_resamp, (int16_t) ( input_Fs / 50 ) );

                /* flip the spectrum */
                mvr2r( new_swb_speech, spchTmp, L_resamp );
                for ( i = 0; i < L_resamp; i = i + 2 )
                {
                    spchTmp[i] = -spchTmp[i];
                }

                /* Dirty upsampling to match Nyquist/2 to lower frequency limit of target (reversed spectrum)*/
                lerp( spchTmp, spchTmp2, L_FRAME32k, L_resamp );
                mvr2r( spchTmp2, spchTmp, L_FRAME32k );
            }
            else
            {
                /* flip the spectrum */
                mvr2r( new_swb_speech, spchTmp, L_FRAME32k );

                for ( i = 0; i < L_FRAME32k; i = i + 2 )
                {
                    spchTmp[i] = -spchTmp[i];
                }
            }
#else
            /* flip the spectrm */
            mvr2r( new_swb_speech, spchTmp, L_FRAME32k );

            for ( i = 0; i < L_FRAME32k; i = i + 2 )
            {
                spchTmp[i] = -spchTmp[i];
            }
#endif
            Decimate_allpass_steep( spchTmp, hBWE_TD->state_ana_filt_shb, L_FRAME32k, shb_speech );

            mvr2r( shb_speech + L_FRAME16k - ( L_LOOK_16k + L_SUBFR16k ), hBWE_TD->old_speech_shb, L_LOOK_16k + L_SUBFR16k );

            /*Compute the past overlap for potential next iDFTs SHB*/
@@ -723,13 +770,23 @@ void swb_pre_proc(
            /* Reset CLDFB synthesis buffer */
            set_f( st->cldfbSynTd->cldfb_state, 0.0f, st->cldfbSynTd->p_filter_length );
        }
#ifdef FIX_I102_SWB_TBE_SWITCH
        else
        {
            hCPE->hStereoDft->flip_sign = -hCPE->hStereoDft->flip_sign; /* Make sure sign is updated even if DFT SHB target is not generated */
        }
#endif
    }

    /* Memory reset to compensate for 0.9375 ms offset when transitioning from IO to SWB */
    /* When switching from n >1 to n = 1, we keep the enc/dec delay as 8.75/3.25 and below code not needed;
       only when n = 1 start, it will be 9.6875/2.3125 in that case this reset is needed for IO->BWE.*/
#ifdef FIX_I102_SWB_TBE_SWITCH
    if ( st->last_extl == -1 && st->element_mode == EVS_MONO )
#else
    /* IVAS_fmToDo: revisit for IVAS (the condition is currently entered for both TD and DFT stereo - is it desirable?) */
    if ( st->last_extl == -1 )
#endif
    {
        delay = NS2SA( input_Fs, DELAY_FIR_RESAMPL_NS );
        for ( i = 0; i < delay; i++ )