Loading lib_dec/acelp_core_dec.c +1 −1 Original line number Diff line number Diff line Loading @@ -315,7 +315,7 @@ ivas_error acelp_core_dec( { int16_t dec; if ( st->hPFstat->on != 0 ) if ( st->hPFstat != NULL && st->hPFstat->on == 0 ) { int16_t mem_syn_r_size_old, mem_syn_r_size_new; Loading lib_dec/ivas_stereo_switching_dec.c +6 −3 Original line number Diff line number Diff line Loading @@ -1536,9 +1536,6 @@ void stereo_switching_dec( cldfb_reset_memory( sts[1]->cldfbSyn ); sts[1]->mem_deemph = 0; #ifdef FIX_1563_FIX_STEREO_SW sts[1]->last_core = ACELP_CORE; #endif sts[1]->tilt_code = 0.0f; sts[1]->gc_threshold = 0.0f; Loading Loading @@ -1566,6 +1563,12 @@ void stereo_switching_dec( mvr2r( sts[0]->delay_buf_out, sts[1]->delay_buf_out, HQ_DELTA_MAX * HQ_DELAY_COMP ); mvr2r( sts[0]->hTcxDec->old_syn_Overl, sts[1]->hTcxDec->old_syn_Overl, 256 ); } #ifdef FIX_1563_FIX_STEREO_SWaa else if( hCPE->element_mode == IVAS_CPE_TD ) { sts[1]->last_core = ACELP_CORE; } #endif } else if ( hCPE->element_mode == IVAS_CPE_TD && hCPE->last_element_mode == IVAS_CPE_MDCT ) { Loading Loading
lib_dec/acelp_core_dec.c +1 −1 Original line number Diff line number Diff line Loading @@ -315,7 +315,7 @@ ivas_error acelp_core_dec( { int16_t dec; if ( st->hPFstat->on != 0 ) if ( st->hPFstat != NULL && st->hPFstat->on == 0 ) { int16_t mem_syn_r_size_old, mem_syn_r_size_new; Loading
lib_dec/ivas_stereo_switching_dec.c +6 −3 Original line number Diff line number Diff line Loading @@ -1536,9 +1536,6 @@ void stereo_switching_dec( cldfb_reset_memory( sts[1]->cldfbSyn ); sts[1]->mem_deemph = 0; #ifdef FIX_1563_FIX_STEREO_SW sts[1]->last_core = ACELP_CORE; #endif sts[1]->tilt_code = 0.0f; sts[1]->gc_threshold = 0.0f; Loading Loading @@ -1566,6 +1563,12 @@ void stereo_switching_dec( mvr2r( sts[0]->delay_buf_out, sts[1]->delay_buf_out, HQ_DELTA_MAX * HQ_DELAY_COMP ); mvr2r( sts[0]->hTcxDec->old_syn_Overl, sts[1]->hTcxDec->old_syn_Overl, 256 ); } #ifdef FIX_1563_FIX_STEREO_SWaa else if( hCPE->element_mode == IVAS_CPE_TD ) { sts[1]->last_core = ACELP_CORE; } #endif } else if ( hCPE->element_mode == IVAS_CPE_TD && hCPE->last_element_mode == IVAS_CPE_MDCT ) { Loading