Loading lib_com/options.h +3 −0 Original line number Diff line number Diff line Loading @@ -166,7 +166,10 @@ #define FIX_1082_INSTRUM_FAILED_LC3PLUS /* VoiceAge: issue 1082: fix ambiguous syntax in LC3Plus code leading to fails of instrumented builds */ #define FIX_1052_EXT_OUTPUT /* VA: issue 1052: define EXT decoder output configuration for stereo and MC formats */ #define FIX_989_TD_REND_ROM /* Eri: Clean-up for TD renderer and completion of ROM generation tool */ #define FIX_1068_ASAN_IN_MC_2_BINAURAL_ROOM_IR /* issue 1068 : Memory leak in MC to BINAURAL_ROOM decoding with bitrate switching*/ /* #################### End BE switches ################################## */ /* #################### Start NON-BE switches ############################ */ Loading lib_rend/ivas_objectRenderer_mix.c +69 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,9 @@ #include "wmc_auto.h" #include "ivas_rom_rend.h" #include "ivas_rom_binaural_crend_head.h" #ifdef FIX_989_TD_REND_ROM #include <math.h> #endif #ifdef DEBUGGING #include "debug.h" #endif Loading Loading @@ -386,6 +389,9 @@ static ivas_error DefaultBSplineModel( ModelParamsITD_t *modelITD; int16_t i, j; ivas_error error; #ifdef FIX_989_TD_REND_ROM float azimSegSamples; #endif HrFiltSet_p->FilterMethod = TDREND_HRFILT_Method_BSplineModel; model = &( HrFiltSet_p->ModelParams ); Loading @@ -396,6 +402,15 @@ static ivas_error DefaultBSplineModel( model->modelROM = TRUE; /* int16_t parameters */ #ifdef FIX_989_TD_REND_ROM model->UseItdModel = defaultHRIR_rom_model_configuration[0]; model->elevDim3 = defaultHRIR_rom_model_configuration[1]; model->AlphaN = defaultHRIR_rom_model_configuration[2]; model->num_unique_azim_splines = defaultHRIR_rom_model_configuration[3]; model->elevSegSamples = defaultHRIR_rom_model_configuration[4]; model->elevBsLen = defaultHRIR_rom_elevBsLen; model->elevBsStart = defaultHRIR_rom_elevBsStart; #else model->UseItdModel = 1; model->SplineDegree = 4; model->elevDim2 = 17; Loading @@ -413,6 +428,7 @@ static ivas_error DefaultBSplineModel( model->elevBsStart[3] = 27; model->azimDim2 = defaultHRIR_rom_azimDim2; #endif model->azimDim3 = defaultHRIR_rom_azimDim3; model->azim_start_idx = defaultHRIR_rom_azim_start_idx; model->azimSegSamples = defaultHRIR_rom_azimSegSamples; Loading @@ -429,10 +445,36 @@ static ivas_error DefaultBSplineModel( } model->azimBsShape[0] = (const float *) defaultHRIR_rom_azimBsShape; #ifdef FIX_989_TD_REND_ROM if ( ( model->azimKSeq = (float **) malloc( model->elevDim3 * sizeof( float * ) ) ) == NULL ) #else if ( ( model->azimKSeq = (float **) malloc( 18 * sizeof( float * ) ) ) == NULL ) #endif { return ( IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for Binaural TD renderer\n" ) ); } #ifdef FIX_989_TD_REND_ROM for ( i = 0; i < model->elevDim3; i++ ) { if ( ( model->azimKSeq[i] = (float *) malloc( ( model->azimDim3[i] + 1 ) * sizeof( float * ) ) ) == NULL ) { return ( IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for Binaural TD renderer\n" ) ); } if ( model->azimShapeIdx[i] < 0 ) { azimSegSamples = 360.0f; } else { azimSegSamples = defaultHRIR_rom_azimSegSamples[model->azimShapeIdx[i]]; } assert( azimSegSamples == 360.0f / model->azimDim3[i] ); for ( j = 0; j < model->azimDim3[i] + 1; j++ ) { model->azimKSeq[i][j] = azimSegSamples * j; } } #else if ( ( model->azimKSeq[0] = (float *) malloc( 2 * sizeof( float * ) ) ) == NULL ) { return ( IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for Binaural TD renderer\n" ) ); Loading @@ -457,6 +499,7 @@ static ivas_error DefaultBSplineModel( model->azimKSeq[i][j] = (float) defaultHRIR_rom_azimSegSamples[0] * j; } } #endif switch ( output_Fs ) { Loading @@ -465,7 +508,11 @@ static ivas_error DefaultBSplineModel( model->AlphaR = (const float *) defaultHRIR_rom_AlphaR48; model->EL = (const float *) defaultHRIR_rom_EL48; model->ER = (const float *) defaultHRIR_rom_ER48; #ifdef FIX_989_TD_REND_ROM model->K = defaultHRIR_rom_model_configuration[5]; #else model->K = 128; #endif if ( HrFiltSet_p->ModelParams.UseItdModel ) { modelITD->resamp_factor = 1.0f; Loading @@ -476,7 +523,11 @@ static ivas_error DefaultBSplineModel( model->AlphaR = (const float *) defaultHRIR_rom_AlphaR32; model->EL = (const float *) defaultHRIR_rom_EL32; model->ER = (const float *) defaultHRIR_rom_ER32; #ifdef FIX_989_TD_REND_ROM model->K = (int16_t) ceil( RESAMPLE_FACTOR_32_48 * defaultHRIR_rom_model_configuration[5] ); #else model->K = 86; #endif if ( HrFiltSet_p->ModelParams.UseItdModel ) { modelITD->resamp_factor = RESAMPLE_FACTOR_32_48; Loading @@ -487,7 +538,11 @@ static ivas_error DefaultBSplineModel( model->AlphaR = (const float *) defaultHRIR_rom_AlphaR16; model->EL = (const float *) defaultHRIR_rom_EL16; model->ER = (const float *) defaultHRIR_rom_ER16; #ifdef FIX_989_TD_REND_ROM model->K = (int16_t) ceil( RESAMPLE_FACTOR_16_48 * defaultHRIR_rom_model_configuration[5] ); #else model->K = 43; #endif if ( HrFiltSet_p->ModelParams.UseItdModel ) { modelITD->resamp_factor = RESAMPLE_FACTOR_16_48; Loading @@ -497,6 +552,14 @@ static ivas_error DefaultBSplineModel( break; } #ifdef FIX_989_TD_REND_ROM modelITD->elevDim3 = defaultHRIR_rom_ITD_model_configuration[0]; modelITD->azimDim3 = defaultHRIR_rom_ITD_model_configuration[1]; modelITD->elevSegSamples = defaultHRIR_rom_ITD_model_configuration[2]; modelITD->azimSegSamples = defaultHRIR_rom_ITD_model_configuration[3]; modelITD->elevBsLen = defaultHRIR_rom_ITD_elevBsLen; modelITD->elevBsStart = defaultHRIR_rom_ITD_elevBsStart; #else modelITD->N = 4; modelITD->elevDim2 = 20; modelITD->elevDim3 = 18; Loading @@ -511,9 +574,14 @@ static ivas_error DefaultBSplineModel( modelITD->elevBsStart[1] = 4; modelITD->elevBsStart[2] = 11; modelITD->elevBsStart[3] = 21; #endif modelITD->elevKSeq = defaultHRIR_rom_ITD_elevKSeq; #ifdef FIX_989_TD_REND_ROM modelITD->azimBsLen = defaultHRIR_rom_ITD_azimBsLen; modelITD->azimBsStart = defaultHRIR_rom_ITD_azimBsStart; #else modelITD->azimBsLen[0] = 11; modelITD->azimBsLen[1] = 21; modelITD->azimBsLen[2] = 31; Loading @@ -524,6 +592,7 @@ static ivas_error DefaultBSplineModel( modelITD->azimBsStart[3] = 63; modelITD->azimSegSamples = 10; #endif modelITD->azimKSeq = defaultHRIR_rom_ITD_azimKSeq; modelITD->W = (const float *) defaultHRIR_rom_ITD_W; Loading lib_rend/ivas_rom_TdBinauralRenderer.c +37 −0 Original line number Diff line number Diff line Loading @@ -50,9 +50,26 @@ *------------------------------------------------------------------------*/ /* TD renderer default HRIR model */ const float defaultHRIR_rom_latency_s = 0.000020834f; #ifdef FIX_989_TD_REND_ROM const int16_t defaultHRIR_rom_model_configuration[6] = { 1, /* UseItdModel */ 15, /* elevDim3 */ 470, /* AlphaN */ 1, /* num_unique_azim_splines */ 4, /* elevSegSamples */ 128, /* K_48k */ }; const int16_t defaultHRIR_rom_elevBsLen[4] = { 5, 9, 13, 9, }; const int16_t defaultHRIR_rom_elevBsStart[4] = { 0, 5, 14, 27, }; #else const int16_t defaultHRIR_rom_azimDim2[15] = { 1, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 1, }; #endif const int16_t defaultHRIR_rom_azimDim3[15] = { 1, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 1, }; Loading Loading @@ -10139,6 +10156,26 @@ const uint32_t defaultHRIR_rom_ITD_W[658] = { 0x3c678a1c,0xbdeb0ba5,0xbe2218a5,0x3e58dcde,0x3d71aaa0,0xbef80fb9,0xbf3d07e1,0x3f3485be,0x3db783c0,0x3c142933,0xbed36b04,0xbb9f1f49,0x3ebfdc23,0xbcc7652e,0xbdb4e6cd,0xbf3be092,0x3f399c4e,0x3ef2eb6a,0xbd93a618,0xbe480d88,0x3e1bd187,0x3df79a5d,0xbc53f8d6,0xbf002186,0xbd41bc42, 0x3e5c0f28,0x3f2ad402,0xbf3cc2c3,0xbedc59d1,0xbe021816,0x3ea43429,0x3d349309,0xbab986b3, }; #ifdef FIX_989_TD_REND_ROM const int16_t defaultHRIR_rom_ITD_model_configuration[4] = { 18, /* elevDim3 */ 41, /* azimDim3 */ 3, /* elevSegSamples */ 10, /* azimSegSamples */ }; const int16_t defaultHRIR_rom_ITD_elevBsLen[4] = { 4, 7, 10, 7, }; const int16_t defaultHRIR_rom_ITD_elevBsStart[4] = { 0, 4, 11, 21, }; const int16_t defaultHRIR_rom_ITD_azimBsLen[4] = { 11, 21, 31, 21, }; const int16_t defaultHRIR_rom_ITD_azimBsStart[4] = { 0, 11, 32, 63, }; #endif const uint32_t defaultHRIR_rom_ITD_azimBsShape[84] = { 0x3f800000,0x3f3a9fbe,0x3f03126f,0x3eaf9db2,0x3e5d2f1b,0x3e000000,0x3d83126f,0x3cdd2f1b,0x3c03126f,0x3a83126f,0xa5800000,0x00000000,0x3e8374bc,0x3ede353f,0x3f0ad0e5,0x3f178d50,0x3f180000,0x3f0ed917,0x3efd9168,0x3ed4fdf4,0x3ea95810,0x3e800000,0x3e3a9fbe,0x3e03126f,0x3daf9db2, 0x3d5d2f1b,0x3d000000,0x3c83126f,0x3bdd2f1b,0x3b03126f,0x3983126f,0xa6000000,0x00000000,0x3c66bdc8,0x3d57b901,0x3de1cac1,0x3e39af72,0x3e855555,0x3eaf1aa0,0x3ed756b3,0x3efb38a9,0x3f0bf7cf,0x3f155555,0x3f18aec3,0x3f16872b,0x3f0fc3ed,0x3f054a69,0x3ef00000,0x3ed19423,0x3eb11bfd, lib_rend/ivas_rom_TdBinauralRenderer.h +15 −0 Original line number Diff line number Diff line Loading @@ -47,7 +47,11 @@ *------------------------------------------------------------------------*/ /* TD renderer default HRIR model */ extern const float defaultHRIR_rom_latency_s; #ifdef FIX_989_TD_REND_ROM extern const int16_t defaultHRIR_rom_model_configuration[6]; #else extern const int16_t defaultHRIR_rom_azimDim2[15]; #endif extern const int16_t defaultHRIR_rom_azimDim3[15]; extern const int16_t defaultHRIR_rom_azim_start_idx[15]; extern const int16_t defaultHRIR_rom_azimSegSamples[1]; Loading @@ -66,6 +70,10 @@ extern const uint32_t defaultHRIR_rom_EL32[HRTF_MODEL_N_SECTIONS * 470]; extern const uint32_t defaultHRIR_rom_ER32[HRTF_MODEL_N_SECTIONS * 470]; extern const uint32_t defaultHRIR_rom_EL16[HRTF_MODEL_N_SECTIONS * 470]; extern const uint32_t defaultHRIR_rom_ER16[HRTF_MODEL_N_SECTIONS * 470]; #ifdef FIX_989_TD_REND_ROM extern const int16_t defaultHRIR_rom_elevBsLen[4]; extern const int16_t defaultHRIR_rom_elevBsStart[4]; #endif extern const uint32_t defaultHRIR_rom_elevBsShape[36]; extern const uint32_t defaultHRIR_rom_azimBsShape[21]; extern const uint32_t defaultHRIR_rom_ITD_W[658]; Loading @@ -73,4 +81,11 @@ extern const uint32_t defaultHRIR_rom_ITD_azimBsShape[84]; extern const float defaultHRIR_rom_ITD_azimKSeq[19]; extern const uint32_t defaultHRIR_rom_ITD_elevBsShape[28]; extern const float defaultHRIR_rom_ITD_elevKSeq[16]; #ifdef FIX_989_TD_REND_ROM extern const int16_t defaultHRIR_rom_ITD_model_configuration[4]; extern const int16_t defaultHRIR_rom_ITD_elevBsLen[4]; extern const int16_t defaultHRIR_rom_ITD_elevBsStart[4]; extern const int16_t defaultHRIR_rom_ITD_azimBsLen[4]; extern const int16_t defaultHRIR_rom_ITD_azimBsStart[4]; #endif #endif lib_rend/ivas_stat_rend.h +40 −2 Original line number Diff line number Diff line Loading @@ -926,17 +926,26 @@ typedef struct { int16_t modelROM; /* Flag that indicates that the model resides in ROM (controls init/dealloc). */ int16_t UseItdModel; /* Controls whether ITD model is used. */ #ifdef FIX_989_TD_REND_ROM int16_t K; /* Length of filter */ #else int16_t SplineDegree; /* Degree of the spline functions */ int16_t K; /* Length of filter */ int16_t elevDim2; #endif int16_t elevDim3; int16_t AlphaN; /* Number of rows in Alpha matrices */ int16_t num_unique_azim_splines; int16_t elevSegSamples; #ifdef FIX_989_TD_REND_ROM const int16_t *elevBsLen; const int16_t *elevBsStart; #else int16_t elevBsLen[HRTF_MODEL_BSPLINE_NUM_COEFFS]; int16_t elevBsStart[HRTF_MODEL_BSPLINE_NUM_COEFFS]; const int16_t *azimDim2; #endif const int16_t *azimDim3; const int16_t *azim_start_idx; const int16_t *azimSegSamples; Loading @@ -963,7 +972,12 @@ typedef struct float *ER_dyn; float *elevBsShape_dyn; float *elevKSeq_dyn; #ifdef FIX_989_TD_REND_ROM int16_t *elevBsLen_dyn; int16_t *elevBsStart_dyn; #else int16_t *azimDim2_dyn; #endif int16_t *azimDim3_dyn; int16_t *azim_start_idx_dyn; int16_t *azimSegSamples_dyn; Loading @@ -975,6 +989,13 @@ typedef struct typedef struct { #ifdef FIX_989_TD_REND_ROM int16_t elevDim3; const float *elevKSeq; /* Array, length elevDim3-2 */ int16_t azimDim3; const float *azimKSeq; /* Array, length azimDim3-2 */ const float *W; /* Array, size (elevDim3*azimDim3) x K */ #else int16_t N; /* Polynomial degree */ int16_t elevDim2; Loading @@ -984,14 +1005,25 @@ typedef struct int16_t azimDim3; const float *azimKSeq; /* Array, length azimDim3-2 */ const float *W; /* Array, size (elevDim3*azimDim3) x K */ #endif #ifdef FIX_989_TD_REND_ROM const int16_t *azimBsLen; const int16_t *azimBsStart; #else int16_t azimBsLen[HRTF_MODEL_BSPLINE_NUM_COEFFS]; int16_t azimBsStart[HRTF_MODEL_BSPLINE_NUM_COEFFS]; #endif const float *azimBsShape; int16_t azimSegSamples; #ifdef FIX_989_TD_REND_ROM const int16_t *elevBsLen; const int16_t *elevBsStart; #else int16_t elevBsLen[HRTF_MODEL_BSPLINE_NUM_COEFFS]; int16_t elevBsStart[HRTF_MODEL_BSPLINE_NUM_COEFFS]; #endif const float *elevBsShape; int16_t elevSegSamples; float resamp_factor; Loading @@ -1002,6 +1034,12 @@ typedef struct float *W_dyn; float *azimBsShape_dyn; float *elevBsShape_dyn; #ifdef FIX_989_TD_REND_ROM int16_t *azimBsLen_dyn; int16_t *azimBsStart_dyn; int16_t *elevBsLen_dyn; int16_t *elevBsStart_dyn; #endif } ModelParamsITD_t; Loading Loading
lib_com/options.h +3 −0 Original line number Diff line number Diff line Loading @@ -166,7 +166,10 @@ #define FIX_1082_INSTRUM_FAILED_LC3PLUS /* VoiceAge: issue 1082: fix ambiguous syntax in LC3Plus code leading to fails of instrumented builds */ #define FIX_1052_EXT_OUTPUT /* VA: issue 1052: define EXT decoder output configuration for stereo and MC formats */ #define FIX_989_TD_REND_ROM /* Eri: Clean-up for TD renderer and completion of ROM generation tool */ #define FIX_1068_ASAN_IN_MC_2_BINAURAL_ROOM_IR /* issue 1068 : Memory leak in MC to BINAURAL_ROOM decoding with bitrate switching*/ /* #################### End BE switches ################################## */ /* #################### Start NON-BE switches ############################ */ Loading
lib_rend/ivas_objectRenderer_mix.c +69 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,9 @@ #include "wmc_auto.h" #include "ivas_rom_rend.h" #include "ivas_rom_binaural_crend_head.h" #ifdef FIX_989_TD_REND_ROM #include <math.h> #endif #ifdef DEBUGGING #include "debug.h" #endif Loading Loading @@ -386,6 +389,9 @@ static ivas_error DefaultBSplineModel( ModelParamsITD_t *modelITD; int16_t i, j; ivas_error error; #ifdef FIX_989_TD_REND_ROM float azimSegSamples; #endif HrFiltSet_p->FilterMethod = TDREND_HRFILT_Method_BSplineModel; model = &( HrFiltSet_p->ModelParams ); Loading @@ -396,6 +402,15 @@ static ivas_error DefaultBSplineModel( model->modelROM = TRUE; /* int16_t parameters */ #ifdef FIX_989_TD_REND_ROM model->UseItdModel = defaultHRIR_rom_model_configuration[0]; model->elevDim3 = defaultHRIR_rom_model_configuration[1]; model->AlphaN = defaultHRIR_rom_model_configuration[2]; model->num_unique_azim_splines = defaultHRIR_rom_model_configuration[3]; model->elevSegSamples = defaultHRIR_rom_model_configuration[4]; model->elevBsLen = defaultHRIR_rom_elevBsLen; model->elevBsStart = defaultHRIR_rom_elevBsStart; #else model->UseItdModel = 1; model->SplineDegree = 4; model->elevDim2 = 17; Loading @@ -413,6 +428,7 @@ static ivas_error DefaultBSplineModel( model->elevBsStart[3] = 27; model->azimDim2 = defaultHRIR_rom_azimDim2; #endif model->azimDim3 = defaultHRIR_rom_azimDim3; model->azim_start_idx = defaultHRIR_rom_azim_start_idx; model->azimSegSamples = defaultHRIR_rom_azimSegSamples; Loading @@ -429,10 +445,36 @@ static ivas_error DefaultBSplineModel( } model->azimBsShape[0] = (const float *) defaultHRIR_rom_azimBsShape; #ifdef FIX_989_TD_REND_ROM if ( ( model->azimKSeq = (float **) malloc( model->elevDim3 * sizeof( float * ) ) ) == NULL ) #else if ( ( model->azimKSeq = (float **) malloc( 18 * sizeof( float * ) ) ) == NULL ) #endif { return ( IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for Binaural TD renderer\n" ) ); } #ifdef FIX_989_TD_REND_ROM for ( i = 0; i < model->elevDim3; i++ ) { if ( ( model->azimKSeq[i] = (float *) malloc( ( model->azimDim3[i] + 1 ) * sizeof( float * ) ) ) == NULL ) { return ( IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for Binaural TD renderer\n" ) ); } if ( model->azimShapeIdx[i] < 0 ) { azimSegSamples = 360.0f; } else { azimSegSamples = defaultHRIR_rom_azimSegSamples[model->azimShapeIdx[i]]; } assert( azimSegSamples == 360.0f / model->azimDim3[i] ); for ( j = 0; j < model->azimDim3[i] + 1; j++ ) { model->azimKSeq[i][j] = azimSegSamples * j; } } #else if ( ( model->azimKSeq[0] = (float *) malloc( 2 * sizeof( float * ) ) ) == NULL ) { return ( IVAS_ERROR( IVAS_ERR_FAILED_ALLOC, "Can not allocate memory for Binaural TD renderer\n" ) ); Loading @@ -457,6 +499,7 @@ static ivas_error DefaultBSplineModel( model->azimKSeq[i][j] = (float) defaultHRIR_rom_azimSegSamples[0] * j; } } #endif switch ( output_Fs ) { Loading @@ -465,7 +508,11 @@ static ivas_error DefaultBSplineModel( model->AlphaR = (const float *) defaultHRIR_rom_AlphaR48; model->EL = (const float *) defaultHRIR_rom_EL48; model->ER = (const float *) defaultHRIR_rom_ER48; #ifdef FIX_989_TD_REND_ROM model->K = defaultHRIR_rom_model_configuration[5]; #else model->K = 128; #endif if ( HrFiltSet_p->ModelParams.UseItdModel ) { modelITD->resamp_factor = 1.0f; Loading @@ -476,7 +523,11 @@ static ivas_error DefaultBSplineModel( model->AlphaR = (const float *) defaultHRIR_rom_AlphaR32; model->EL = (const float *) defaultHRIR_rom_EL32; model->ER = (const float *) defaultHRIR_rom_ER32; #ifdef FIX_989_TD_REND_ROM model->K = (int16_t) ceil( RESAMPLE_FACTOR_32_48 * defaultHRIR_rom_model_configuration[5] ); #else model->K = 86; #endif if ( HrFiltSet_p->ModelParams.UseItdModel ) { modelITD->resamp_factor = RESAMPLE_FACTOR_32_48; Loading @@ -487,7 +538,11 @@ static ivas_error DefaultBSplineModel( model->AlphaR = (const float *) defaultHRIR_rom_AlphaR16; model->EL = (const float *) defaultHRIR_rom_EL16; model->ER = (const float *) defaultHRIR_rom_ER16; #ifdef FIX_989_TD_REND_ROM model->K = (int16_t) ceil( RESAMPLE_FACTOR_16_48 * defaultHRIR_rom_model_configuration[5] ); #else model->K = 43; #endif if ( HrFiltSet_p->ModelParams.UseItdModel ) { modelITD->resamp_factor = RESAMPLE_FACTOR_16_48; Loading @@ -497,6 +552,14 @@ static ivas_error DefaultBSplineModel( break; } #ifdef FIX_989_TD_REND_ROM modelITD->elevDim3 = defaultHRIR_rom_ITD_model_configuration[0]; modelITD->azimDim3 = defaultHRIR_rom_ITD_model_configuration[1]; modelITD->elevSegSamples = defaultHRIR_rom_ITD_model_configuration[2]; modelITD->azimSegSamples = defaultHRIR_rom_ITD_model_configuration[3]; modelITD->elevBsLen = defaultHRIR_rom_ITD_elevBsLen; modelITD->elevBsStart = defaultHRIR_rom_ITD_elevBsStart; #else modelITD->N = 4; modelITD->elevDim2 = 20; modelITD->elevDim3 = 18; Loading @@ -511,9 +574,14 @@ static ivas_error DefaultBSplineModel( modelITD->elevBsStart[1] = 4; modelITD->elevBsStart[2] = 11; modelITD->elevBsStart[3] = 21; #endif modelITD->elevKSeq = defaultHRIR_rom_ITD_elevKSeq; #ifdef FIX_989_TD_REND_ROM modelITD->azimBsLen = defaultHRIR_rom_ITD_azimBsLen; modelITD->azimBsStart = defaultHRIR_rom_ITD_azimBsStart; #else modelITD->azimBsLen[0] = 11; modelITD->azimBsLen[1] = 21; modelITD->azimBsLen[2] = 31; Loading @@ -524,6 +592,7 @@ static ivas_error DefaultBSplineModel( modelITD->azimBsStart[3] = 63; modelITD->azimSegSamples = 10; #endif modelITD->azimKSeq = defaultHRIR_rom_ITD_azimKSeq; modelITD->W = (const float *) defaultHRIR_rom_ITD_W; Loading
lib_rend/ivas_rom_TdBinauralRenderer.c +37 −0 Original line number Diff line number Diff line Loading @@ -50,9 +50,26 @@ *------------------------------------------------------------------------*/ /* TD renderer default HRIR model */ const float defaultHRIR_rom_latency_s = 0.000020834f; #ifdef FIX_989_TD_REND_ROM const int16_t defaultHRIR_rom_model_configuration[6] = { 1, /* UseItdModel */ 15, /* elevDim3 */ 470, /* AlphaN */ 1, /* num_unique_azim_splines */ 4, /* elevSegSamples */ 128, /* K_48k */ }; const int16_t defaultHRIR_rom_elevBsLen[4] = { 5, 9, 13, 9, }; const int16_t defaultHRIR_rom_elevBsStart[4] = { 0, 5, 14, 27, }; #else const int16_t defaultHRIR_rom_azimDim2[15] = { 1, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 1, }; #endif const int16_t defaultHRIR_rom_azimDim3[15] = { 1, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 1, }; Loading Loading @@ -10139,6 +10156,26 @@ const uint32_t defaultHRIR_rom_ITD_W[658] = { 0x3c678a1c,0xbdeb0ba5,0xbe2218a5,0x3e58dcde,0x3d71aaa0,0xbef80fb9,0xbf3d07e1,0x3f3485be,0x3db783c0,0x3c142933,0xbed36b04,0xbb9f1f49,0x3ebfdc23,0xbcc7652e,0xbdb4e6cd,0xbf3be092,0x3f399c4e,0x3ef2eb6a,0xbd93a618,0xbe480d88,0x3e1bd187,0x3df79a5d,0xbc53f8d6,0xbf002186,0xbd41bc42, 0x3e5c0f28,0x3f2ad402,0xbf3cc2c3,0xbedc59d1,0xbe021816,0x3ea43429,0x3d349309,0xbab986b3, }; #ifdef FIX_989_TD_REND_ROM const int16_t defaultHRIR_rom_ITD_model_configuration[4] = { 18, /* elevDim3 */ 41, /* azimDim3 */ 3, /* elevSegSamples */ 10, /* azimSegSamples */ }; const int16_t defaultHRIR_rom_ITD_elevBsLen[4] = { 4, 7, 10, 7, }; const int16_t defaultHRIR_rom_ITD_elevBsStart[4] = { 0, 4, 11, 21, }; const int16_t defaultHRIR_rom_ITD_azimBsLen[4] = { 11, 21, 31, 21, }; const int16_t defaultHRIR_rom_ITD_azimBsStart[4] = { 0, 11, 32, 63, }; #endif const uint32_t defaultHRIR_rom_ITD_azimBsShape[84] = { 0x3f800000,0x3f3a9fbe,0x3f03126f,0x3eaf9db2,0x3e5d2f1b,0x3e000000,0x3d83126f,0x3cdd2f1b,0x3c03126f,0x3a83126f,0xa5800000,0x00000000,0x3e8374bc,0x3ede353f,0x3f0ad0e5,0x3f178d50,0x3f180000,0x3f0ed917,0x3efd9168,0x3ed4fdf4,0x3ea95810,0x3e800000,0x3e3a9fbe,0x3e03126f,0x3daf9db2, 0x3d5d2f1b,0x3d000000,0x3c83126f,0x3bdd2f1b,0x3b03126f,0x3983126f,0xa6000000,0x00000000,0x3c66bdc8,0x3d57b901,0x3de1cac1,0x3e39af72,0x3e855555,0x3eaf1aa0,0x3ed756b3,0x3efb38a9,0x3f0bf7cf,0x3f155555,0x3f18aec3,0x3f16872b,0x3f0fc3ed,0x3f054a69,0x3ef00000,0x3ed19423,0x3eb11bfd,
lib_rend/ivas_rom_TdBinauralRenderer.h +15 −0 Original line number Diff line number Diff line Loading @@ -47,7 +47,11 @@ *------------------------------------------------------------------------*/ /* TD renderer default HRIR model */ extern const float defaultHRIR_rom_latency_s; #ifdef FIX_989_TD_REND_ROM extern const int16_t defaultHRIR_rom_model_configuration[6]; #else extern const int16_t defaultHRIR_rom_azimDim2[15]; #endif extern const int16_t defaultHRIR_rom_azimDim3[15]; extern const int16_t defaultHRIR_rom_azim_start_idx[15]; extern const int16_t defaultHRIR_rom_azimSegSamples[1]; Loading @@ -66,6 +70,10 @@ extern const uint32_t defaultHRIR_rom_EL32[HRTF_MODEL_N_SECTIONS * 470]; extern const uint32_t defaultHRIR_rom_ER32[HRTF_MODEL_N_SECTIONS * 470]; extern const uint32_t defaultHRIR_rom_EL16[HRTF_MODEL_N_SECTIONS * 470]; extern const uint32_t defaultHRIR_rom_ER16[HRTF_MODEL_N_SECTIONS * 470]; #ifdef FIX_989_TD_REND_ROM extern const int16_t defaultHRIR_rom_elevBsLen[4]; extern const int16_t defaultHRIR_rom_elevBsStart[4]; #endif extern const uint32_t defaultHRIR_rom_elevBsShape[36]; extern const uint32_t defaultHRIR_rom_azimBsShape[21]; extern const uint32_t defaultHRIR_rom_ITD_W[658]; Loading @@ -73,4 +81,11 @@ extern const uint32_t defaultHRIR_rom_ITD_azimBsShape[84]; extern const float defaultHRIR_rom_ITD_azimKSeq[19]; extern const uint32_t defaultHRIR_rom_ITD_elevBsShape[28]; extern const float defaultHRIR_rom_ITD_elevKSeq[16]; #ifdef FIX_989_TD_REND_ROM extern const int16_t defaultHRIR_rom_ITD_model_configuration[4]; extern const int16_t defaultHRIR_rom_ITD_elevBsLen[4]; extern const int16_t defaultHRIR_rom_ITD_elevBsStart[4]; extern const int16_t defaultHRIR_rom_ITD_azimBsLen[4]; extern const int16_t defaultHRIR_rom_ITD_azimBsStart[4]; #endif #endif
lib_rend/ivas_stat_rend.h +40 −2 Original line number Diff line number Diff line Loading @@ -926,17 +926,26 @@ typedef struct { int16_t modelROM; /* Flag that indicates that the model resides in ROM (controls init/dealloc). */ int16_t UseItdModel; /* Controls whether ITD model is used. */ #ifdef FIX_989_TD_REND_ROM int16_t K; /* Length of filter */ #else int16_t SplineDegree; /* Degree of the spline functions */ int16_t K; /* Length of filter */ int16_t elevDim2; #endif int16_t elevDim3; int16_t AlphaN; /* Number of rows in Alpha matrices */ int16_t num_unique_azim_splines; int16_t elevSegSamples; #ifdef FIX_989_TD_REND_ROM const int16_t *elevBsLen; const int16_t *elevBsStart; #else int16_t elevBsLen[HRTF_MODEL_BSPLINE_NUM_COEFFS]; int16_t elevBsStart[HRTF_MODEL_BSPLINE_NUM_COEFFS]; const int16_t *azimDim2; #endif const int16_t *azimDim3; const int16_t *azim_start_idx; const int16_t *azimSegSamples; Loading @@ -963,7 +972,12 @@ typedef struct float *ER_dyn; float *elevBsShape_dyn; float *elevKSeq_dyn; #ifdef FIX_989_TD_REND_ROM int16_t *elevBsLen_dyn; int16_t *elevBsStart_dyn; #else int16_t *azimDim2_dyn; #endif int16_t *azimDim3_dyn; int16_t *azim_start_idx_dyn; int16_t *azimSegSamples_dyn; Loading @@ -975,6 +989,13 @@ typedef struct typedef struct { #ifdef FIX_989_TD_REND_ROM int16_t elevDim3; const float *elevKSeq; /* Array, length elevDim3-2 */ int16_t azimDim3; const float *azimKSeq; /* Array, length azimDim3-2 */ const float *W; /* Array, size (elevDim3*azimDim3) x K */ #else int16_t N; /* Polynomial degree */ int16_t elevDim2; Loading @@ -984,14 +1005,25 @@ typedef struct int16_t azimDim3; const float *azimKSeq; /* Array, length azimDim3-2 */ const float *W; /* Array, size (elevDim3*azimDim3) x K */ #endif #ifdef FIX_989_TD_REND_ROM const int16_t *azimBsLen; const int16_t *azimBsStart; #else int16_t azimBsLen[HRTF_MODEL_BSPLINE_NUM_COEFFS]; int16_t azimBsStart[HRTF_MODEL_BSPLINE_NUM_COEFFS]; #endif const float *azimBsShape; int16_t azimSegSamples; #ifdef FIX_989_TD_REND_ROM const int16_t *elevBsLen; const int16_t *elevBsStart; #else int16_t elevBsLen[HRTF_MODEL_BSPLINE_NUM_COEFFS]; int16_t elevBsStart[HRTF_MODEL_BSPLINE_NUM_COEFFS]; #endif const float *elevBsShape; int16_t elevSegSamples; float resamp_factor; Loading @@ -1002,6 +1034,12 @@ typedef struct float *W_dyn; float *azimBsShape_dyn; float *elevBsShape_dyn; #ifdef FIX_989_TD_REND_ROM int16_t *azimBsLen_dyn; int16_t *azimBsStart_dyn; int16_t *elevBsLen_dyn; int16_t *elevBsStart_dyn; #endif } ModelParamsITD_t; Loading