Commit 9166da42 authored by Anika Treffehn's avatar Anika Treffehn
Browse files

formatting

parent cbfbd5b1

ivas_processing_scripts/processing/processing.py

+0 −1
Original line number Diff line number Diff line
@@ -323,7 +323,6 @@ def preprocess_2(cfg, logger): 




def reverse_process_2(cfg, logger):



    # remove preamble and first half of signal due to repetition

    if cfg.pre2.preamble or cfg.pre2.repeat_signal:

        remove_preamble(cfg, logger)