Commit e304f83c authored by Anika Treffehn's avatar Anika Treffehn
Browse files

added seeds to config

parent 70a51085

examples/TEMPLATE.yml

+5 −1
Original line number Diff line number Diff line
@@ -14,6 +14,10 @@ 
### Deletion of temporary directories containing 

### intermediate processing files, bitstreams etc.; default = false

# delete_tmp: true

### Master seed for random processes like bitstream error pattern generation; default = 0

# master_seed: 5

### Additional seed to specify number of preruns; default = 0

# prerun_seed: 2



### Any relative paths will be interpreted relative to the working directory the script is called from!

### Usage of absolute paths is recommended.
@@ -105,7 +109,7 @@ input: 
    # error_pattern: ".../dly_error_profile.dat"

    ### Index of one of the existing delay error profile files to use (1-11)

    # error_profile: 5

    ## nFramesPerPacket parameter for the network simulator (optional); default = 1

    ## nFramesPerPacket parameter for the network simulator; default = 1

    # n_frames_per_packet: 2

    

    ### FER

ivas_processing_scripts/constants.py

+2 −0
Original line number Diff line number Diff line
@@ -58,6 +58,8 @@ DEFAULT_CONFIG = { 
    "git_sha": f"{get_gitsha()}",

    "multiprocessing": True,

    "delete_tmp": False,

    "master_seed": 0,

    "prerun_seed": 0,

    "concatenate_input": False,

    "concat_silence": {

        "pre": 0,

ivas_processing_scripts/processing/chains.py

+2 −0
Original line number Diff line number Diff line
@@ -220,6 +220,8 @@ def get_processing_chain( 
                    "type": cfg.tx.get("type", None),

                    "error_pattern": cfg.tx.get("error_pattern", None),

                    "error_rate": cfg.tx.get("error_rate", None),

                    "master_seed": cfg.master_seed,

                    "prerun_seed": cfg.prerun_seed,

                }

            elif cfg.tx.get("type", None) == "JBM":

                tx_cfg = {

ivas_processing_scripts/processing/ivas.py

+7 −6
Original line number Diff line number Diff line
@@ -236,14 +236,15 @@ class IVAS(Processing): 
                signal, _ = read(

                    in_file, fs=self.in_fs

                )  # TODO: pass down number of frames and preamble from concatenation

                # TODO: pass seed

                logger.debug(f"Frame loss simulator {bitstream} -> {bitstream_processed}")

                create_and_apply_error_pattern(

                    bitstream,

                    bitstream_processed,

                    len(signal),

                    self.tx["error_pattern"],

                    self.tx["error_rate"],

                    in_bitstream=bitstream,

                    out_bitstream=bitstream_processed,

                    len_sig=len(signal),

                    error_pattern=self.tx["error_pattern"],

                    error_rate=self.tx["error_rate"],

                    master_seed=self.tx["master_seed"],

                    prerun_seed=self.tx["prerun_seed"],

                )



                return bitstream_processed