Commit 075d0b67 authored by Mohammadreza Naghibzadeh's avatar Mohammadreza Naghibzadeh
Browse files

Modified Q_syn_Overl in the PLC calculation.

Disabled temp. workaround for input of con_tcx_ivas_fx()
parent 21c4f5a5
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+5 −3
Original line number Diff line number Diff line
@@ -1099,8 +1099,8 @@ void ivas_mdct_core_reconstruct_fx(
    Word16 q_syn = 0;
    move16();
#ifdef FIX_1348_BIT_PRECISION_IMPROVEMENT_QWIN
    Word16 q_win;
    Word16 q_winFB;
    Word16 q_win = 0;
    Word16 q_winFB = 0;
#else
#ifdef FIX_1348_BIT_PRECISION_IMPROVEMENT
    Word16 q_win = -1;
@@ -1426,10 +1426,12 @@ void ivas_mdct_core_reconstruct_fx(
            st->Q_syn = q_syn;
            move16();
            st->hTcxDec->Q_old_syn_Overl = add( st->hTcxDec->Q_old_syn_Overl, q_syn );
#ifdef FIX_1348_BIT_PRECISION_IMPROVEMENT_QWIN
            move16();
#ifdef FIX_1348_BIT_PRECISION_IMPROVEMENT_QWIN
            st->hTcxDec->Q_syn_OverlFB = add( st->hTcxDec->Q_syn_OverlFB, q_syn );
            move16();
            st->hTcxDec->Q_syn_Overl = add( st->hTcxDec->Q_syn_Overl, q_syn );
            move16();
#endif

            IF( ( EQ_16( st->nbLostCmpt, 1 ) ) || ( st->hTcxDec->tcxConceal_recalc_exc != 0 ) )