Loading lib_enc/cod4t64_fx.c +3 −2 Original line number Diff line number Diff line Loading @@ -482,7 +482,8 @@ Word16 acelp_4t64_ivas_fx( Word16 y[], /* o : filtered fixed codebook excitation Q9*/ Word16 nbbits, /* i : number of bits per codebook */ const Word16 cmpl_flag, /* i : complexity reduction flag */ const Word16 Opt_AMR_WB /* i : flag indicating AMR-WB IO mode */ const Word16 Opt_AMR_WB, /* i : flag indicating AMR-WB IO mode */ Word16 element_mode ) { Loading Loading @@ -716,7 +717,7 @@ Word16 acelp_4t64_ivas_fx( IF( acelpautoc ) { E_ACELP_4tsearchx_fx( dn, cn, R, code, &config, ind ); E_ACELP_4tsearchx_ivas_fx( dn, cn, R, code, &config, ind, element_mode ); /* Generate weighted code */ E_ACELP_weighted_code( code, H, 12, y ); Loading lib_enc/inov_enc_fx.c +9 −9 Original line number Diff line number Diff line Loading @@ -756,7 +756,7 @@ Word16 inov_encode_ivas_fx( } ELSE { *unbits = add( *unbits, acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, nBits, cmpl_flag, Opt_AMR_WB ) ); *unbits = add( *unbits, acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, nBits, cmpl_flag, Opt_AMR_WB, st_fx->element_mode ) ); move16(); } } Loading @@ -769,35 +769,35 @@ Word16 inov_encode_ivas_fx( } ELSE IF( ( EQ_32( core_brate, ACELP_8k85 ) ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 20, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 20, cmpl_flag, Opt_AMR_WB, st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_12k65 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 36, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 36, cmpl_flag, Opt_AMR_WB , st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_14k25 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 44, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 44, cmpl_flag, Opt_AMR_WB, st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_15k85 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 52, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 52, cmpl_flag, Opt_AMR_WB , st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_18k25 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 64, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 64, cmpl_flag, Opt_AMR_WB , st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_19k85 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 72, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 72, cmpl_flag, Opt_AMR_WB, st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_23k05 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 88, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 88, cmpl_flag, Opt_AMR_WB , st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_23k85 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 88, 1, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 88, 1, Opt_AMR_WB , st_fx->element_mode); } } Loading lib_enc/prot_fx_enc.h +2 −1 Original line number Diff line number Diff line Loading @@ -4321,7 +4321,8 @@ Word16 acelp_4t64_ivas_fx( Word16 y[], /* o : filtered fixed codebook excitation Q9*/ Word16 nbbits, /* i : number of bits per codebook */ const Word16 cmpl_flag, /* i : complexity reduction flag */ const Word16 Opt_AMR_WB /* i : flag indicating AMR-WB IO mode */ const Word16 Opt_AMR_WB, /* i : flag indicating AMR-WB IO mode */ Word16 element_mode ); ivas_error evs_enc_fx( Loading Loading
lib_enc/cod4t64_fx.c +3 −2 Original line number Diff line number Diff line Loading @@ -482,7 +482,8 @@ Word16 acelp_4t64_ivas_fx( Word16 y[], /* o : filtered fixed codebook excitation Q9*/ Word16 nbbits, /* i : number of bits per codebook */ const Word16 cmpl_flag, /* i : complexity reduction flag */ const Word16 Opt_AMR_WB /* i : flag indicating AMR-WB IO mode */ const Word16 Opt_AMR_WB, /* i : flag indicating AMR-WB IO mode */ Word16 element_mode ) { Loading Loading @@ -716,7 +717,7 @@ Word16 acelp_4t64_ivas_fx( IF( acelpautoc ) { E_ACELP_4tsearchx_fx( dn, cn, R, code, &config, ind ); E_ACELP_4tsearchx_ivas_fx( dn, cn, R, code, &config, ind, element_mode ); /* Generate weighted code */ E_ACELP_weighted_code( code, H, 12, y ); Loading
lib_enc/inov_enc_fx.c +9 −9 Original line number Diff line number Diff line Loading @@ -756,7 +756,7 @@ Word16 inov_encode_ivas_fx( } ELSE { *unbits = add( *unbits, acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, nBits, cmpl_flag, Opt_AMR_WB ) ); *unbits = add( *unbits, acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, nBits, cmpl_flag, Opt_AMR_WB, st_fx->element_mode ) ); move16(); } } Loading @@ -769,35 +769,35 @@ Word16 inov_encode_ivas_fx( } ELSE IF( ( EQ_32( core_brate, ACELP_8k85 ) ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 20, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 20, cmpl_flag, Opt_AMR_WB, st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_12k65 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 36, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 36, cmpl_flag, Opt_AMR_WB , st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_14k25 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 44, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 44, cmpl_flag, Opt_AMR_WB, st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_15k85 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 52, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 52, cmpl_flag, Opt_AMR_WB , st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_18k25 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 64, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 64, cmpl_flag, Opt_AMR_WB , st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_19k85 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 72, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 72, cmpl_flag, Opt_AMR_WB, st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_23k05 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 88, cmpl_flag, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 88, cmpl_flag, Opt_AMR_WB , st_fx->element_mode); } ELSE IF( EQ_32( core_brate, ACELP_23k85 ) ) { acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 88, 1, Opt_AMR_WB ); acelp_4t64_ivas_fx( hBstr, dn, cn, h2, Rw, acelpautoc, code, y2, 88, 1, Opt_AMR_WB , st_fx->element_mode); } } Loading
lib_enc/prot_fx_enc.h +2 −1 Original line number Diff line number Diff line Loading @@ -4321,7 +4321,8 @@ Word16 acelp_4t64_ivas_fx( Word16 y[], /* o : filtered fixed codebook excitation Q9*/ Word16 nbbits, /* i : number of bits per codebook */ const Word16 cmpl_flag, /* i : complexity reduction flag */ const Word16 Opt_AMR_WB /* i : flag indicating AMR-WB IO mode */ const Word16 Opt_AMR_WB, /* i : flag indicating AMR-WB IO mode */ Word16 element_mode ); ivas_error evs_enc_fx( Loading