Loading lib_enc/ivas_cpe_enc_fx.c +2 −2 Original line number Diff line number Diff line Loading @@ -991,7 +991,7 @@ ivas_error ivas_cpe_enc_fx( #ifdef FIX_1411_IGF_CRASH_BW_SWITCHING test(); test(); IF( NE_16( ( EQ_16( sts[0]->core_brate, SID_2k40 ) || EQ_16( sts[0]->core_brate, FRAME_NO_DATA ) ), 0 ) ) /* Reconfigurations not needed with DTX*/ IF( NE_16( ( EQ_32( sts[0]->core_brate, SID_2k40 ) || EQ_32( sts[0]->core_brate, FRAME_NO_DATA ) ), 0 ) ) /* Reconfigurations not needed with DTX*/ { #endif test(); Loading Loading @@ -1036,7 +1036,7 @@ ivas_error ivas_cpe_enc_fx( #ifdef FIX_1411_IGF_CRASH_BW_SWITCHING test(); test(); IF( ( NE_32( hCPE->last_element_brate, hCPE->element_brate ) || NE_16( hCPE->element_mode, hCPE->last_element_mode ) || ( EQ_16( hCPE->element_mode, IVAS_CPE_TD ) && NE_16( sts[0]->bits_frame_nominal, last_bits_frame_nominal ) ) || NE_16( sts[n]->last_bwidth, sts[n]->bwidth ) || EQ_16( sts[n]->last_core_brate, SID_2k40 ) || EQ_16( sts[n]->last_core_brate, FRAME_NO_DATA ) ) && ( EQ_16( n, 0 ) || EQ_16( hCPE->element_mode, IVAS_CPE_MDCT ) ) ) IF( ( NE_32( hCPE->last_element_brate, hCPE->element_brate ) || NE_16( hCPE->element_mode, hCPE->last_element_mode ) || ( EQ_16( hCPE->element_mode, IVAS_CPE_TD ) && NE_16( sts[0]->bits_frame_nominal, last_bits_frame_nominal ) ) || NE_16( sts[n]->last_bwidth, sts[n]->bwidth ) || EQ_32( sts[n]->last_core_brate, SID_2k40 ) || EQ_32( sts[n]->last_core_brate, FRAME_NO_DATA ) ) && ( EQ_16( n, 0 ) || EQ_16( hCPE->element_mode, IVAS_CPE_MDCT ) ) ) #else IF( ( NE_32( hCPE->last_element_brate, hCPE->element_brate ) || NE_16( hCPE->element_mode, hCPE->last_element_mode ) || ( EQ_16( hCPE->element_mode, IVAS_CPE_TD ) && NE_16( sts[0]->bits_frame_nominal, last_bits_frame_nominal ) ) || NE_16( sts[n]->last_bwidth, sts[n]->bwidth ) ) && ( n == 0 || EQ_16( hCPE->element_mode, IVAS_CPE_MDCT ) ) ) #endif Loading Loading
lib_enc/ivas_cpe_enc_fx.c +2 −2 Original line number Diff line number Diff line Loading @@ -991,7 +991,7 @@ ivas_error ivas_cpe_enc_fx( #ifdef FIX_1411_IGF_CRASH_BW_SWITCHING test(); test(); IF( NE_16( ( EQ_16( sts[0]->core_brate, SID_2k40 ) || EQ_16( sts[0]->core_brate, FRAME_NO_DATA ) ), 0 ) ) /* Reconfigurations not needed with DTX*/ IF( NE_16( ( EQ_32( sts[0]->core_brate, SID_2k40 ) || EQ_32( sts[0]->core_brate, FRAME_NO_DATA ) ), 0 ) ) /* Reconfigurations not needed with DTX*/ { #endif test(); Loading Loading @@ -1036,7 +1036,7 @@ ivas_error ivas_cpe_enc_fx( #ifdef FIX_1411_IGF_CRASH_BW_SWITCHING test(); test(); IF( ( NE_32( hCPE->last_element_brate, hCPE->element_brate ) || NE_16( hCPE->element_mode, hCPE->last_element_mode ) || ( EQ_16( hCPE->element_mode, IVAS_CPE_TD ) && NE_16( sts[0]->bits_frame_nominal, last_bits_frame_nominal ) ) || NE_16( sts[n]->last_bwidth, sts[n]->bwidth ) || EQ_16( sts[n]->last_core_brate, SID_2k40 ) || EQ_16( sts[n]->last_core_brate, FRAME_NO_DATA ) ) && ( EQ_16( n, 0 ) || EQ_16( hCPE->element_mode, IVAS_CPE_MDCT ) ) ) IF( ( NE_32( hCPE->last_element_brate, hCPE->element_brate ) || NE_16( hCPE->element_mode, hCPE->last_element_mode ) || ( EQ_16( hCPE->element_mode, IVAS_CPE_TD ) && NE_16( sts[0]->bits_frame_nominal, last_bits_frame_nominal ) ) || NE_16( sts[n]->last_bwidth, sts[n]->bwidth ) || EQ_32( sts[n]->last_core_brate, SID_2k40 ) || EQ_32( sts[n]->last_core_brate, FRAME_NO_DATA ) ) && ( EQ_16( n, 0 ) || EQ_16( hCPE->element_mode, IVAS_CPE_MDCT ) ) ) #else IF( ( NE_32( hCPE->last_element_brate, hCPE->element_brate ) || NE_16( hCPE->element_mode, hCPE->last_element_mode ) || ( EQ_16( hCPE->element_mode, IVAS_CPE_TD ) && NE_16( sts[0]->bits_frame_nominal, last_bits_frame_nominal ) ) || NE_16( sts[n]->last_bwidth, sts[n]->bwidth ) ) && ( n == 0 || EQ_16( hCPE->element_mode, IVAS_CPE_MDCT ) ) ) #endif Loading