Loading lib_dec/ivas_binRenderer_internal.c +26 −7 Original line number Diff line number Diff line Loading @@ -554,6 +554,8 @@ static ivas_error ivas_binRenderer_convModuleOpen( } #ifdef SPLIT_REND_WITH_HEAD_ROT IF( EQ_16( renderer_type, RENDERER_BINAURAL_FASTCONV_ROOM ) ) { for ( pos_idx = 0; pos_idx < num_poses; pos_idx++ ) { for ( bandIdx = 0; bandIdx < hBinRenderer->conv_band; bandIdx++ ) Loading @@ -563,10 +565,27 @@ static ivas_error ivas_binRenderer_convModuleOpen( /* set the memories to zero */ set32_fx( hBinRenConvModule->filterStatesLeftReal_fx[pos_idx][bandIdx][chIdx], 0, hBinRenConvModule->numTapsArray[bandIdx] ); set32_fx( hBinRenConvModule->filterStatesLeftImag_fx[pos_idx][bandIdx][chIdx], 0, hBinRenConvModule->numTapsArray[bandIdx] ); set16_fx( hBinRenConvModule->Q_filterStatesLeft[pos_idx][bandIdx][chIdx], 31, hBinRenConvModule->numTapsArray[bandIdx] ); } } } } ELSE { for ( pos_idx = 0; pos_idx < num_poses; pos_idx++ ) { for ( bandIdx = 0; bandIdx < hBinRenderer->conv_band; bandIdx++ ) { for ( chIdx = 0; chIdx < hBinRenderer->nInChannels; chIdx++ ) { /* set the memories to zero */ set32_fx( hBinRenConvModule->filterStatesLeftReal_fx[pos_idx][bandIdx][chIdx], 0, hBinRenConvModule->numTaps ); set32_fx( hBinRenConvModule->filterStatesLeftImag_fx[pos_idx][bandIdx][chIdx], 0, hBinRenConvModule->numTaps ); set16_fx( hBinRenConvModule->Q_filterStatesLeft[pos_idx][bandIdx][chIdx], 31, hBinRenConvModule->numTaps ); } } } } #endif hBinRenderer->hBinRenConvModule = hBinRenConvModule; Loading lib_lc3plus/defines.h +0 −1 Original line number Diff line number Diff line Loading @@ -725,7 +725,6 @@ do not change __forceinline for mex compilation using gcc6.3.0 or larger #endif #define scratchAlign(ptr, offset) (void *)(((uintptr_t)(ptr) + (offset) + 0x3) & ~0x3) #define ALIGN_BUFFER_STRUCT /* some configurations leave empty translation units. */ Loading lib_lc3plus/setup_dec_lc3.h +9 −9 Original line number Diff line number Diff line Loading @@ -28,9 +28,9 @@ typedef struct Word16 tdc_preemph_fac; Word16 tdc_lpc_order; Word16 cum_fflcAtten; Word16 harmonicBuf_fx[MAX_PITCH] ALIGN_BUFFER_STRUCT; Word16 harmonicBuf_fx[MAX_PITCH]; Word16 harmonicBuf_Q; Word16 synthHist_fx[M] ALIGN_BUFFER_STRUCT; Word16 synthHist_fx[M]; Word16 cum_fading_slow; Word16 cum_fading_fast; Word16 PhECU_LprotOrg_fx; /* needed to change the Prot size adaptively */ Loading Loading @@ -63,17 +63,17 @@ typedef struct Word32 PhECU_L_old_xfp_w_E_fx; Word16 PhECU_oold_xfp_w_E_exp_fx; /* input Word16 xfp exponnet */ Word16 PhECU_old_xfp_w_E_exp_fx; Word16 PhECU_oold_grp_shape_fx[MAX_LGW] ALIGN_BUFFER_STRUCT; Word16 PhECU_old_grp_shape_fx[MAX_LGW] ALIGN_BUFFER_STRUCT; Word16 PhECU_oold_grp_shape_fx[MAX_LGW]; Word16 PhECU_old_grp_shape_fx[MAX_LGW]; Word16 PhECU_margin_xfp; #ifdef CR8_A_PLC_FADEOUT_TUNING Word16 PhECU_nonpure_tone_flag; /* non-pure single tone indicator state */ #endif Word16 PhECU_mag_chg_1st[MAX_LGW] ALIGN_BUFFER_STRUCT; Word16 PhECU_Xavg[MAX_LGW] ALIGN_BUFFER_STRUCT; Word16 old_scf_q[M] ALIGN_BUFFER_STRUCT; Word16 old_old_scf_q[M] ALIGN_BUFFER_STRUCT; Word16 tdc_A[M + 1] ALIGN_BUFFER_STRUCT; Word16 PhECU_mag_chg_1st[MAX_LGW]; Word16 PhECU_Xavg[MAX_LGW]; Word16 old_scf_q[M]; Word16 old_old_scf_q[M]; Word16 tdc_A[M + 1]; /* for now 20 ms saved Q14 or ptr to a combined ifft win and MDCT preTDA synthesis window 16 ms */ #ifdef CR8_A_PLC_FADEOUT_TUNING Loading lib_lc3plus/setup_enc_lc3.h +10 −10 Original line number Diff line number Diff line Loading @@ -53,24 +53,24 @@ typedef struct Word16 attdec_scaling; #ifdef ENABLE_HR_MODE Word16 regBits; Word32 resamp_mem32[120] ALIGN_BUFFER_STRUCT; Word32 resamp_mem32[120]; #else Word32 resamp_mem32[60] ALIGN_BUFFER_STRUCT; Word32 resamp_mem32[60]; #endif #ifdef ENABLE_HR_MODE Word16 r12k8_mem_in[120] ALIGN_BUFFER_STRUCT; Word16 r12k8_mem_in[120]; #else Word16 r12k8_mem_in[60] ALIGN_BUFFER_STRUCT; Word16 r12k8_mem_in[60]; #endif Word32 r12k8_mem_50[2] ALIGN_BUFFER_STRUCT; Word32 r12k8_mem_50[2]; #ifdef CR8_G_ADD_75MS Word16 r12k8_mem_out[44] ALIGN_BUFFER_STRUCT; Word16 r12k8_mem_out[44]; #else Word16 r12k8_mem_out[24] ALIGN_BUFFER_STRUCT; Word16 r12k8_mem_out[24]; #endif Word16 olpa_mem_s12k8[3] ALIGN_BUFFER_STRUCT; Word16 olpa_mem_s6k4[LEN_6K4 + MAX_PITCH_6K4 + 16] ALIGN_BUFFER_STRUCT; Word16 ltpf_mem_in[LTPF_MEMIN_LEN + LEN_12K8 + 1] ALIGN_BUFFER_STRUCT; Word16 olpa_mem_s12k8[3]; Word16 olpa_mem_s6k4[LEN_6K4 + MAX_PITCH_6K4 + 16]; Word16 ltpf_mem_in[LTPF_MEMIN_LEN + LEN_12K8 + 1]; Word16 n_pccw; Word16 n_pc; Loading Loading
lib_dec/ivas_binRenderer_internal.c +26 −7 Original line number Diff line number Diff line Loading @@ -554,6 +554,8 @@ static ivas_error ivas_binRenderer_convModuleOpen( } #ifdef SPLIT_REND_WITH_HEAD_ROT IF( EQ_16( renderer_type, RENDERER_BINAURAL_FASTCONV_ROOM ) ) { for ( pos_idx = 0; pos_idx < num_poses; pos_idx++ ) { for ( bandIdx = 0; bandIdx < hBinRenderer->conv_band; bandIdx++ ) Loading @@ -563,10 +565,27 @@ static ivas_error ivas_binRenderer_convModuleOpen( /* set the memories to zero */ set32_fx( hBinRenConvModule->filterStatesLeftReal_fx[pos_idx][bandIdx][chIdx], 0, hBinRenConvModule->numTapsArray[bandIdx] ); set32_fx( hBinRenConvModule->filterStatesLeftImag_fx[pos_idx][bandIdx][chIdx], 0, hBinRenConvModule->numTapsArray[bandIdx] ); set16_fx( hBinRenConvModule->Q_filterStatesLeft[pos_idx][bandIdx][chIdx], 31, hBinRenConvModule->numTapsArray[bandIdx] ); } } } } ELSE { for ( pos_idx = 0; pos_idx < num_poses; pos_idx++ ) { for ( bandIdx = 0; bandIdx < hBinRenderer->conv_band; bandIdx++ ) { for ( chIdx = 0; chIdx < hBinRenderer->nInChannels; chIdx++ ) { /* set the memories to zero */ set32_fx( hBinRenConvModule->filterStatesLeftReal_fx[pos_idx][bandIdx][chIdx], 0, hBinRenConvModule->numTaps ); set32_fx( hBinRenConvModule->filterStatesLeftImag_fx[pos_idx][bandIdx][chIdx], 0, hBinRenConvModule->numTaps ); set16_fx( hBinRenConvModule->Q_filterStatesLeft[pos_idx][bandIdx][chIdx], 31, hBinRenConvModule->numTaps ); } } } } #endif hBinRenderer->hBinRenConvModule = hBinRenConvModule; Loading
lib_lc3plus/defines.h +0 −1 Original line number Diff line number Diff line Loading @@ -725,7 +725,6 @@ do not change __forceinline for mex compilation using gcc6.3.0 or larger #endif #define scratchAlign(ptr, offset) (void *)(((uintptr_t)(ptr) + (offset) + 0x3) & ~0x3) #define ALIGN_BUFFER_STRUCT /* some configurations leave empty translation units. */ Loading
lib_lc3plus/setup_dec_lc3.h +9 −9 Original line number Diff line number Diff line Loading @@ -28,9 +28,9 @@ typedef struct Word16 tdc_preemph_fac; Word16 tdc_lpc_order; Word16 cum_fflcAtten; Word16 harmonicBuf_fx[MAX_PITCH] ALIGN_BUFFER_STRUCT; Word16 harmonicBuf_fx[MAX_PITCH]; Word16 harmonicBuf_Q; Word16 synthHist_fx[M] ALIGN_BUFFER_STRUCT; Word16 synthHist_fx[M]; Word16 cum_fading_slow; Word16 cum_fading_fast; Word16 PhECU_LprotOrg_fx; /* needed to change the Prot size adaptively */ Loading Loading @@ -63,17 +63,17 @@ typedef struct Word32 PhECU_L_old_xfp_w_E_fx; Word16 PhECU_oold_xfp_w_E_exp_fx; /* input Word16 xfp exponnet */ Word16 PhECU_old_xfp_w_E_exp_fx; Word16 PhECU_oold_grp_shape_fx[MAX_LGW] ALIGN_BUFFER_STRUCT; Word16 PhECU_old_grp_shape_fx[MAX_LGW] ALIGN_BUFFER_STRUCT; Word16 PhECU_oold_grp_shape_fx[MAX_LGW]; Word16 PhECU_old_grp_shape_fx[MAX_LGW]; Word16 PhECU_margin_xfp; #ifdef CR8_A_PLC_FADEOUT_TUNING Word16 PhECU_nonpure_tone_flag; /* non-pure single tone indicator state */ #endif Word16 PhECU_mag_chg_1st[MAX_LGW] ALIGN_BUFFER_STRUCT; Word16 PhECU_Xavg[MAX_LGW] ALIGN_BUFFER_STRUCT; Word16 old_scf_q[M] ALIGN_BUFFER_STRUCT; Word16 old_old_scf_q[M] ALIGN_BUFFER_STRUCT; Word16 tdc_A[M + 1] ALIGN_BUFFER_STRUCT; Word16 PhECU_mag_chg_1st[MAX_LGW]; Word16 PhECU_Xavg[MAX_LGW]; Word16 old_scf_q[M]; Word16 old_old_scf_q[M]; Word16 tdc_A[M + 1]; /* for now 20 ms saved Q14 or ptr to a combined ifft win and MDCT preTDA synthesis window 16 ms */ #ifdef CR8_A_PLC_FADEOUT_TUNING Loading
lib_lc3plus/setup_enc_lc3.h +10 −10 Original line number Diff line number Diff line Loading @@ -53,24 +53,24 @@ typedef struct Word16 attdec_scaling; #ifdef ENABLE_HR_MODE Word16 regBits; Word32 resamp_mem32[120] ALIGN_BUFFER_STRUCT; Word32 resamp_mem32[120]; #else Word32 resamp_mem32[60] ALIGN_BUFFER_STRUCT; Word32 resamp_mem32[60]; #endif #ifdef ENABLE_HR_MODE Word16 r12k8_mem_in[120] ALIGN_BUFFER_STRUCT; Word16 r12k8_mem_in[120]; #else Word16 r12k8_mem_in[60] ALIGN_BUFFER_STRUCT; Word16 r12k8_mem_in[60]; #endif Word32 r12k8_mem_50[2] ALIGN_BUFFER_STRUCT; Word32 r12k8_mem_50[2]; #ifdef CR8_G_ADD_75MS Word16 r12k8_mem_out[44] ALIGN_BUFFER_STRUCT; Word16 r12k8_mem_out[44]; #else Word16 r12k8_mem_out[24] ALIGN_BUFFER_STRUCT; Word16 r12k8_mem_out[24]; #endif Word16 olpa_mem_s12k8[3] ALIGN_BUFFER_STRUCT; Word16 olpa_mem_s6k4[LEN_6K4 + MAX_PITCH_6K4 + 16] ALIGN_BUFFER_STRUCT; Word16 ltpf_mem_in[LTPF_MEMIN_LEN + LEN_12K8 + 1] ALIGN_BUFFER_STRUCT; Word16 olpa_mem_s12k8[3]; Word16 olpa_mem_s6k4[LEN_6K4 + MAX_PITCH_6K4 + 16]; Word16 ltpf_mem_in[LTPF_MEMIN_LEN + LEN_12K8 + 1]; Word16 n_pccw; Word16 n_pc; Loading