Commit 48825a3c authored by emerit's avatar emerit
Browse files

activate only crend othre renderer not ready

parent 9870ae88

lib_com/options.h

+3 −3
Original line number Diff line number Diff line
@@ -117,9 +117,9 @@ 
#ifdef FIX_CREND_SIMPLIFY_CODE

#define FIX_989_TD_REND_ROM                             /* Eri: Clean-up for TD renderer and completion of ROM generation tool */

#define USE_CREND_16BIT_ROM

#define USE_REVERB_16BIT_ROM

#define USE_TDREND_16BIT_ROM

#define USE_FASTCONV_PARAMBIN_16BIT_ROM

//#define USE_REVERB_16BIT_ROM

//#define USE_TDREND_16BIT_ROM                           /* when active some tests case with 4 ISM fail due to owerflow in round_fixed function */

//#define USE_FASTCONV_PARAMBIN_16BIT_ROM

#endif

#define NONBE_1377_REND_DIRATT_CONF                     /* Eri: Issue 1377: Error in directivity attenuation configuration for both IVAS_dec and IVAS_rend */

lib_rend/ivas_objectRenderer_mix_fx.c

+16 −16
Original line number Diff line number Diff line
@@ -599,7 +599,7 @@ static ivas_error DefaultBSplineModel_fx( 
            model->AlphaL_fx = model->AlphaL_dyn_fx;

            model->AlphaL_e = Q15 - defaultHRIR_rom_Alpha48_Q_fx;

#else

            model->AlphaL_fx = defaultHRIR_rom_AlphaL48_fx; // Q30

            model->AlphaL_fx = (const Word32 *) defaultHRIR_rom_AlphaL48_fx; // Q30

            model->AlphaL_e = 1;

#endif

            move16();
@@ -614,18 +614,18 @@ static ivas_error DefaultBSplineModel_fx( 
            model->AlphaR_fx = model->AlphaR_dyn_fx;

            model->AlphaR_e = Q15 - defaultHRIR_rom_Alpha48_Q_fx;

#else

            model->AlphaR_fx = defaultHRIR_rom_AlphaR48_fx; // Q30

            model->AlphaR_fx = (const Word32 *) defaultHRIR_rom_AlphaR48_fx; // Q30

            model->AlphaR_e = 1;

#endif

            move16();

            model->EL_fx = defaultHRIR_rom_EL48_fx; // Q28

            model->EL_fx = (const Word32 *) defaultHRIR_rom_EL48_fx; // Q28

#ifdef USE_TDREND_16BIT_ROM

            model->EL_e = Q31 - defaultHRIR_rom_E48_Q_fx;

#else

            model->EL_e = 3;

#endif

            move16();

            model->ER_fx = defaultHRIR_rom_ER48_fx; // Q28

            model->ER_fx = (const Word32 *) defaultHRIR_rom_ER48_fx; // Q28

#ifdef USE_TDREND_16BIT_ROM

            model->ER_e = Q31 - defaultHRIR_rom_E48_Q_fx;

#else
@@ -656,7 +656,7 @@ static ivas_error DefaultBSplineModel_fx( 
            model->AlphaL_fx = model->AlphaL_dyn_fx;

            model->AlphaL_e = Q15 - defaultHRIR_rom_Alpha32_Q_fx;

#else

            model->AlphaL_fx = defaultHRIR_rom_AlphaL32_fx; // Q30

            model->AlphaL_fx = (const Word32 *) defaultHRIR_rom_AlphaL32_fx; // Q30

            model->AlphaL_e = 1;

#endif

            move16();
@@ -671,18 +671,18 @@ static ivas_error DefaultBSplineModel_fx( 
            model->AlphaR_fx = model->AlphaR_dyn_fx;

            model->AlphaR_e = Q15 - defaultHRIR_rom_Alpha32_Q_fx;

#else

            model->AlphaR_fx = defaultHRIR_rom_AlphaR32_fx; // Q30

            model->AlphaR_fx = (const Word32 *) defaultHRIR_rom_AlphaR32_fx; // Q30

            model->AlphaR_e = 1;

#endif

            move16();

            model->EL_fx = defaultHRIR_rom_EL32_fx; // Q28

            model->EL_fx = (const Word32 *) defaultHRIR_rom_EL32_fx; // Q28

#ifdef USE_TDREND_16BIT_ROM

            model->EL_e = Q31 - defaultHRIR_rom_E32_Q_fx;

#else

            model->EL_e = 3;

#endif

            move16();

            model->ER_fx = defaultHRIR_rom_ER32_fx; // Q28

            model->ER_fx = (const Word32 *) defaultHRIR_rom_ER32_fx; // Q28

#ifdef USE_TDREND_16BIT_ROM

            model->ER_e = Q31 - defaultHRIR_rom_E32_Q_fx;

#else
@@ -712,7 +712,7 @@ static ivas_error DefaultBSplineModel_fx( 
            model->AlphaL_fx = model->AlphaL_dyn_fx;

            model->AlphaL_e = Q15 - defaultHRIR_rom_Alpha16_Q_fx;

#else

            model->AlphaL_fx = defaultHRIR_rom_AlphaL16_fx; // Q30

            model->AlphaL_fx = (const Word32 *) defaultHRIR_rom_AlphaL16_fx; // Q30

            model->AlphaL_e = 1;

#endif

            move16();
@@ -726,11 +726,11 @@ static ivas_error DefaultBSplineModel_fx( 
            model->AlphaR_fx = model->AlphaR_dyn_fx;

            model->AlphaR_e = Q15 - defaultHRIR_rom_Alpha16_Q_fx;

#else

            model->AlphaR_fx = defaultHRIR_rom_AlphaR16_fx; // Q30

            model->AlphaR_fx = (const Word32 *) defaultHRIR_rom_AlphaR16_fx; // Q30

            model->AlphaR_e = 1;

#endif

            move16();

            model->EL_fx = defaultHRIR_rom_EL16_fx; // Q28

            model->EL_fx = (const Word32 *) defaultHRIR_rom_EL16_fx; // Q28

#ifdef USE_TDREND_16BIT_ROM

            model->EL_e = Q31 - defaultHRIR_rom_E16_Q_fx;

            model->EL_e = 3;
@@ -738,7 +738,7 @@ static ivas_error DefaultBSplineModel_fx( 
            model->EL_e = 3;

#endif

            move16();

            model->ER_fx = defaultHRIR_rom_ER16_fx; // Q28

            model->ER_fx = (const Word32 *) defaultHRIR_rom_ER16_fx; // Q28

#ifdef USE_TDREND_16BIT_ROM

            model->ER_e = Q31 - defaultHRIR_rom_E16_Q_fx;

            model->ER_e = 3;
@@ -863,7 +863,7 @@ static ivas_error DefaultBSplineModel_fx( 
    modelITD->W_fx = modelITD->W_dyn_fx;

    modelITD->W_e = Q15 - defaultHRIR_rom_ITD_W_Q_fx;

#else

    modelITD->W_fx = defaultHRIR_rom_ITD_W_fx;               // Q25

    modelITD->W_fx = (const Word32 *) defaultHRIR_rom_ITD_W_fx; // Q25

    modelITD->W_e = 6;

#endif

    move16();