Loading lib_dec/ivas_binRenderer_internal_fx.c +2 −2 Original line number Diff line number Diff line Loading @@ -1863,7 +1863,6 @@ void ivas_binRenderer_fx( } } #ifndef OPT_SBA_DEC_V2_BE #ifndef OPT_BIN_RENDERER_V2 FOR( chIdx = 0; chIdx < BINAURAL_CHANNELS; chIdx++ ) { Loading @@ -1875,6 +1874,8 @@ void ivas_binRenderer_fx( } #endif /* OPT_BIN_RENDERER_V2 */ /* Note: on main, this nested for loop was removed under a "bit-exact optimization" under switch OPT_SBA_DEC_V2_BE */ /* this was found to clash with split rendering, so kept here. WMOPS impact should be assessed */ FOR( chIdx = 0; chIdx < hBinRenderer->hInputSetup->nchan_out_woLFE; chIdx++ ) { FOR( k = 0; k < numTimeSlots; k++ ) Loading @@ -1883,7 +1884,6 @@ void ivas_binRenderer_fx( Copy32( ImagBuffer_fx[chIdx][k], ImagBuffer_local[chIdx][k], CLDFB_NO_CHANNELS_MAX ); } } #endif /* OPT_SBA_DEC_V2_BE */ /* Head rotation in HOA3 or CICPx */ test(); Loading Loading
lib_dec/ivas_binRenderer_internal_fx.c +2 −2 Original line number Diff line number Diff line Loading @@ -1863,7 +1863,6 @@ void ivas_binRenderer_fx( } } #ifndef OPT_SBA_DEC_V2_BE #ifndef OPT_BIN_RENDERER_V2 FOR( chIdx = 0; chIdx < BINAURAL_CHANNELS; chIdx++ ) { Loading @@ -1875,6 +1874,8 @@ void ivas_binRenderer_fx( } #endif /* OPT_BIN_RENDERER_V2 */ /* Note: on main, this nested for loop was removed under a "bit-exact optimization" under switch OPT_SBA_DEC_V2_BE */ /* this was found to clash with split rendering, so kept here. WMOPS impact should be assessed */ FOR( chIdx = 0; chIdx < hBinRenderer->hInputSetup->nchan_out_woLFE; chIdx++ ) { FOR( k = 0; k < numTimeSlots; k++ ) Loading @@ -1883,7 +1884,6 @@ void ivas_binRenderer_fx( Copy32( ImagBuffer_fx[chIdx][k], ImagBuffer_local[chIdx][k], CLDFB_NO_CHANNELS_MAX ); } } #endif /* OPT_SBA_DEC_V2_BE */ /* Head rotation in HOA3 or CICPx */ test(); Loading