Loading lib_dec/FEC_HQ_core_fx.c +11 −6 Original line number Diff line number Diff line Loading @@ -725,10 +725,9 @@ void HQ_FEC_Mem_update_fx( move32(); #endif move32(); // tmp_energy_fx #ifdef ADD_IVAS_HQ_CODE_FEC IF( EQ_16( output_frame, L_FRAME8k ) ) { #endif IF( is_transient ) { Loading Loading @@ -759,10 +758,10 @@ void HQ_FEC_Mem_update_fx( } } } #ifndef ADD_IVAS_HQ_CODE_FEC IF( EQ_16( output_frame, L_FRAME8k ) ) { #endif /* if LR MDCT core is used, recalculate norms from decoded MDCT spectrum (using code from hq_hr_enc_fx()) */ test(); IF( ( EQ_16( hqswb_clas, HQ_HVQ ) ) || ( EQ_16( hq_core_type, LOW_RATE_HQ_CORE ) ) ) Loading Loading @@ -976,9 +975,9 @@ void HQ_FEC_Mem_update_fx( move16(); hHQ_core->old_is_transient[0] = is_transient; move16(); #ifdef ADD_IVAS_HQ_CODE_FEC } #endif return; } Loading Loading @@ -2023,6 +2022,12 @@ void save_synthesis_hq_fec_fx( { Copy_Scale_sig( st->prev_synth_buffer_fx, st->hTcxDec->old_synthFB_fx + sub( shl( output_frame, 1 ), NS2SA_FX2( st->output_Fs, DELAY_BWE_TOTAL_NS ) ), NS2SA_FX2( st->output_Fs, DELAY_BWE_TOTAL_NS - DELAY_CLDFB_NS ), negate( st->Qprev_synth_buffer_fx ) ); /*Q0*/ } /* IVAS Floating point code has the commented-out else branch below, but it does not appear to be necessary. To be verified else { mvr2r( st->hHQ_core->old_out + NS2SA( st->output_Fs, N_ZERO_MDCT_NS ), st->hTcxDec->old_synthFB + 2 * output_frame, NS2SA( st->output_Fs, PH_ECU_LOOKAHEAD_NS ) ); } */ IF( st->core != ACELP_CORE ) { Loading Loading
lib_dec/FEC_HQ_core_fx.c +11 −6 Original line number Diff line number Diff line Loading @@ -725,10 +725,9 @@ void HQ_FEC_Mem_update_fx( move32(); #endif move32(); // tmp_energy_fx #ifdef ADD_IVAS_HQ_CODE_FEC IF( EQ_16( output_frame, L_FRAME8k ) ) { #endif IF( is_transient ) { Loading Loading @@ -759,10 +758,10 @@ void HQ_FEC_Mem_update_fx( } } } #ifndef ADD_IVAS_HQ_CODE_FEC IF( EQ_16( output_frame, L_FRAME8k ) ) { #endif /* if LR MDCT core is used, recalculate norms from decoded MDCT spectrum (using code from hq_hr_enc_fx()) */ test(); IF( ( EQ_16( hqswb_clas, HQ_HVQ ) ) || ( EQ_16( hq_core_type, LOW_RATE_HQ_CORE ) ) ) Loading Loading @@ -976,9 +975,9 @@ void HQ_FEC_Mem_update_fx( move16(); hHQ_core->old_is_transient[0] = is_transient; move16(); #ifdef ADD_IVAS_HQ_CODE_FEC } #endif return; } Loading Loading @@ -2023,6 +2022,12 @@ void save_synthesis_hq_fec_fx( { Copy_Scale_sig( st->prev_synth_buffer_fx, st->hTcxDec->old_synthFB_fx + sub( shl( output_frame, 1 ), NS2SA_FX2( st->output_Fs, DELAY_BWE_TOTAL_NS ) ), NS2SA_FX2( st->output_Fs, DELAY_BWE_TOTAL_NS - DELAY_CLDFB_NS ), negate( st->Qprev_synth_buffer_fx ) ); /*Q0*/ } /* IVAS Floating point code has the commented-out else branch below, but it does not appear to be necessary. To be verified else { mvr2r( st->hHQ_core->old_out + NS2SA( st->output_Fs, N_ZERO_MDCT_NS ), st->hTcxDec->old_synthFB + 2 * output_frame, NS2SA( st->output_Fs, PH_ECU_LOOKAHEAD_NS ) ); } */ IF( st->core != ACELP_CORE ) { Loading