Loading lib_com/hvq_pvq_bitalloc_fx.c +6 −0 Original line number Diff line number Diff line Loading @@ -40,6 +40,10 @@ Word16 hvq_pvq_bitalloc_fx( UWord16 lsb; Word16 num_sfm; #ifdef FIX_1483_PEAQ_VQ_ENC_MSAN_ERROR *n_sel_bands = 0; #endif IF( EQ_16( bwidth_fx, FB ) ) { num_sfm = SFM_N_HARM_FB; Loading Loading @@ -107,7 +111,9 @@ Word16 hvq_pvq_bitalloc_fx( return 0; } #ifndef FIX_1483_PEAQ_VQ_ENC_MSAN_ERROR *n_sel_bands = 0; #endif move16(); envSum = 0; move16(); Loading lib_com/options.h +1 −0 Original line number Diff line number Diff line Loading @@ -103,6 +103,7 @@ #define FIX_1904_HARM_GSC_ENC /* VA: #1904 Harmonization of EVS and IVAS GSC code */ #define FIX_2271_OOB_INDEXING_IN_PIT_OL2 /* VA: Fix for issue 2271, to silence clang18 */ #define FIX_2273_OOB_INDEXING_IN_PIT_FR4 /* VA: Fix to silence clang on ptr init */ #define FIX_1483_PEAQ_VQ_ENC_MSAN_ERROR /* Eri: When no PVQ bands are selected in peaq_vq_enc, the number of bands is not initialized. */ /* #################### End BE switches ################################## */ Loading Loading
lib_com/hvq_pvq_bitalloc_fx.c +6 −0 Original line number Diff line number Diff line Loading @@ -40,6 +40,10 @@ Word16 hvq_pvq_bitalloc_fx( UWord16 lsb; Word16 num_sfm; #ifdef FIX_1483_PEAQ_VQ_ENC_MSAN_ERROR *n_sel_bands = 0; #endif IF( EQ_16( bwidth_fx, FB ) ) { num_sfm = SFM_N_HARM_FB; Loading Loading @@ -107,7 +111,9 @@ Word16 hvq_pvq_bitalloc_fx( return 0; } #ifndef FIX_1483_PEAQ_VQ_ENC_MSAN_ERROR *n_sel_bands = 0; #endif move16(); envSum = 0; move16(); Loading
lib_com/options.h +1 −0 Original line number Diff line number Diff line Loading @@ -103,6 +103,7 @@ #define FIX_1904_HARM_GSC_ENC /* VA: #1904 Harmonization of EVS and IVAS GSC code */ #define FIX_2271_OOB_INDEXING_IN_PIT_OL2 /* VA: Fix for issue 2271, to silence clang18 */ #define FIX_2273_OOB_INDEXING_IN_PIT_FR4 /* VA: Fix to silence clang on ptr init */ #define FIX_1483_PEAQ_VQ_ENC_MSAN_ERROR /* Eri: When no PVQ bands are selected in peaq_vq_enc, the number of bands is not initialized. */ /* #################### End BE switches ################################## */ Loading