Commit c6ed61e2 authored by Nishant S Kulgod's avatar Nishant S Kulgod
Browse files

resolved mod issues within AVQ_encmux_ivas_fx

parent 4da3cb2b

lib_enc/avq_cod_fx.c

+14 −2
Original line number Diff line number Diff line
@@ -588,6 +588,7 @@ void AVQ_encmux_ivas_fx( 
    Word16 bitsMod, Nsvm1, Nsvm2;

    Word16 unusedbitsFlag;

    Word16 svOrder[NSV_MAX], k, nullVec, dummy_bits;

    Word16 tmp;



    test();

    IF( EQ_16( extl, SWB_BWE_HIGHRATE ) || EQ_16( extl, FB_BWE_HIGHRATE ) )
@@ -749,7 +750,13 @@ void AVQ_encmux_ivas_fx( 
        test();

        test();

        test();

        IF( EQ_16( avq_bit_sFlag, 2 ) && EQ_16( s_and( bits, 4 ), 4 ) && GT_16( bits, 8 ) && LT_16( bits, 30 ) && GE_16( k, trgtSvPos ) && LT_16( i, Nsvm1 ) )

        tmp = bits;

        move16();

        WHILE(GE_16(tmp, 5)) {

            tmp = sub(tmp, 5);

        }

        assert(tmp == bits % 5);

        IF( EQ_16( avq_bit_sFlag, 2 ) && EQ_16( tmp, 4 ) && GT_16( bits, 8 ) && LT_16( bits, 30 ) && GE_16( k, trgtSvPos ) && LT_16( i, Nsvm1 ) )

        {

            ordr_esti( sub( Nsv, i ), &trgtSvPos, &svOrder[i], Nsv );

            k = svOrder[i];
@@ -859,7 +866,12 @@ void AVQ_encmux_ivas_fx( 
            {

                overflow = 0;

                move16();

                if ( s_and( add( bitsMod, nullVec ), 4 ) != 0 )

                tmp = add(bitsMod, nullVec);

                WHILE(GE_16(tmp, 5)) {

                    tmp = sub(tmp, 5);

                }

                assert(tmp == add(bitsMod, nullVec) % 5);

                if ( tmp != 0 )

                {

                    overflow = 1;

                    move16();