Loading lib_enc/core_enc_init_fx.c +12 −12 Original line number Diff line number Diff line Loading @@ -1150,9 +1150,20 @@ void init_coder_ace_plus_ivas_fx( #endif } #ifndef HARMONIZE_2567_init_coder_ace_plus #ifdef HARMONIZE_2567_init_coder_ace_plus IF( EQ_16( st->element_mode, EVS_MONO ) ) { /* Initialize Core Signal Analysis Module */ init_core_sig_ana_fx( st ); } ELSE { init_core_sig_ana_ivas_fx( st ); } #else /* Initialize Core Signal Analysis Module */ init_core_sig_ana_ivas_fx( st ); #endif /* Initialize TCX */ Loading @@ -1171,17 +1182,6 @@ void init_coder_ace_plus_ivas_fx( } #endif } #ifdef HARMONIZE_2567_init_coder_ace_plus IF( EQ_16( st->element_mode, EVS_MONO ) ) { /* Initialize Core Signal Analysis Module */ init_core_sig_ana_fx( st ); } ELSE { init_core_sig_ana_ivas_fx( st ); } #endif /* Initialize Signal Buffers */ #ifdef HARMONIZE_2567_init_coder_ace_plus Loading Loading
lib_enc/core_enc_init_fx.c +12 −12 Original line number Diff line number Diff line Loading @@ -1150,9 +1150,20 @@ void init_coder_ace_plus_ivas_fx( #endif } #ifndef HARMONIZE_2567_init_coder_ace_plus #ifdef HARMONIZE_2567_init_coder_ace_plus IF( EQ_16( st->element_mode, EVS_MONO ) ) { /* Initialize Core Signal Analysis Module */ init_core_sig_ana_fx( st ); } ELSE { init_core_sig_ana_ivas_fx( st ); } #else /* Initialize Core Signal Analysis Module */ init_core_sig_ana_ivas_fx( st ); #endif /* Initialize TCX */ Loading @@ -1171,17 +1182,6 @@ void init_coder_ace_plus_ivas_fx( } #endif } #ifdef HARMONIZE_2567_init_coder_ace_plus IF( EQ_16( st->element_mode, EVS_MONO ) ) { /* Initialize Core Signal Analysis Module */ init_core_sig_ana_fx( st ); } ELSE { init_core_sig_ana_ivas_fx( st ); } #endif /* Initialize Signal Buffers */ #ifdef HARMONIZE_2567_init_coder_ace_plus Loading