remove unused functions (def9699d) · Commits · SA4 / Audio / IVAS BASOP

lib_com/bitstream.c

+0 −189

Original line number	Diff line number	Diff line
		@@ -1660,195 +1660,6 @@ static void decoder_selectCodec(
		return;
		}

		/-------------------------------------------------------------------
		* dec_prm_core()
		*
		*
		-------------------------------------------------------------------/

		static void dec_prm_core(
		Decoder_State *st )
		{
		int16_t n, frame_size_index = -1;

		st->core = -1;

		if ( st->total_brate == FRAME_NO_DATA )
		{
		st->m_frame_type = ZERO_FRAME;
		}
		else if ( st->total_brate == SID_2k40 )
		{
		st->m_frame_type = SID_FRAME;
		}
		else
		{
		st->m_frame_type = ACTIVE_FRAME;
		for ( n = 0; n < FRAME_SIZE_NB; ++n )
		{
		if ( FrameSizeConfig[n].frame_bits == st->total_brate / FRAMES_PER_SEC )
		{
		frame_size_index = n;
		break;
		}
		}

		/* Get audio bandwidth info */
		st->bwidth = get_next_indice( st, FrameSizeConfig[frame_size_index].bandwidth_bits );
		st->bwidth += FrameSizeConfig[frame_size_index].bandwidth_min;
		if ( st->bwidth > FB )
		{
		st->bwidth = FB;
		st->BER_detect = 1;
		}

		if ( st->bwidth > SWB && st->total_brate < ACELP_16k40 )
		{
		st->bwidth = SWB;
		st->BER_detect = 1;
		}
		/* Skip reserved bit */
		get_next_indice_tmp( st, FrameSizeConfig[frame_size_index].reserved_bits );

		if ( get_next_indice_1( st ) ) /* TCX */
		{
		if ( get_next_indice_1( st ) )
		{
		st->core = HQ_CORE;
		}
		else
		{
		st->core = TCX_20_CORE;
		}
		}
		else /* ACELP */
		{
		st->core = ACELP_CORE;
		}
		}

		return;
		}

		/-----------------------------------------------------------------
		* decision_matrix_core_dec()
		*
		* Read core signaling bits from the bitstream
		* Set st->core, and st->bwidth if signalled together with the core.
		-----------------------------------------------------------------/

		static void decision_matrix_core_dec(
		Decoder_State st / i/o: decoder state structure */
		)
		{
		int16_t start_idx;
		int32_t ind;
		int16_t nBits;

		assert( st->bfi != 1 );

		st->core = -1;
		st->bwidth = -1;

		if ( st->total_brate == FRAME_NO_DATA \|\| st->total_brate == SID_2k40 )
		{
		st->core = ACELP_CORE;
		}
		/* SC-VBR */
		else if ( st->total_brate == PPP_NELP_2k80 )
		{
		st->core = ACELP_CORE;
		return;
		}

		/---------------------------------------------------------------------
		* ACELP/HQ core selection
		---------------------------------------------------------------------/

		if ( st->total_brate < ACELP_24k40 )
		{
		st->core = ACELP_CORE;
		}
		else if ( st->total_brate >= ACELP_24k40 && st->total_brate <= ACELP_64k )
		{
		/* read the ACELP/HQ core selection bit */
		st->core = get_next_indice( st, 1 ) * HQ_CORE;
		}
		else
		{
		st->core = HQ_CORE;
		}

		/-----------------------------------------------------------------
		* Read ACELP signaling bits from the bitstream
		-----------------------------------------------------------------/

		if ( st->core == ACELP_CORE )
		{
		/* find the section in the ACELP signaling table corresponding to bitrate */
		start_idx = 0;
		while ( acelp_sig_tbl[start_idx] != st->total_brate )
		{
		start_idx++;
		}

		/* skip the bitrate */
		start_idx += 1;

		/* retrieve the number of bits */
		nBits = (int16_t) acelp_sig_tbl[start_idx++];

		/* retrieve the signaling indice */
		ind = acelp_sig_tbl[start_idx + get_next_indice( st, nBits )];
		st->bwidth = ( ind >> 3 ) & 0x7;

		/* convert signaling indice into signaling information */
		if ( ( ind & 0x7 ) == LR_MDCT )
		{
		st->core = HQ_CORE;
		}
		}

		/-----------------------------------------------------------------
		* Read HQ signaling bits from the bitstream
		* Set HQ core type
		-----------------------------------------------------------------/

		if ( st->core == HQ_CORE )
		{
		/* read the HQ/TCX core switching flag */
		if ( get_next_indice( st, 1 ) )
		{
		st->core = TCX_20_CORE;
		}

		/* For TCX: read/set band-width (needed for different I/O sampling rate support) */
		if ( st->core == TCX_20_CORE && st->total_brate > ACELP_16k40 )
		{
		ind = get_next_indice( st, 2 );

		if ( ind == 0 )
		{
		st->bwidth = NB;
		}
		else if ( ind == 1 )
		{
		st->bwidth = WB;
		}
		else if ( ind == 2 )
		{
		st->bwidth = SWB;
		}
		else
		{
		st->bwidth = FB;
		}
		}
		}

		return;
		}


		/-------------------------------------------------------------------
		* reset_elements()